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686d334b05
Added support for bytes replication feature, so it could be GAS compatible.
E.g. instructions below:
"vmov.i32 d0, 0xffffffff"
"vmvn.i32 d0, 0xabababab"
"vmov.i32 d0, 0xabababab"
"vmov.i16 d0, 0xabab"
are incorrect, but we could deal with such cases.
For first one we should emit:
"vmov.i8 d0, 0xff"
For second one ("vmvn"):
"vmov.i8 d0, 0x54"
For last two instructions it should emit:
"vmov.i8 d0, 0xab"
P.S.: In ARMAsmParser.cpp I have also fixed few nearby style issues in old code.
Just for keeping method bodies in harmony with themselves.
llvm-svn: 207080
31 lines
1.1 KiB
ArmAsm
31 lines
1.1 KiB
ArmAsm
@ RUN: not llvm-mc -triple=armv7-linux-gnueabi %s 2>&1 | FileCheck %s
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.text
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@ CHECK: error: invalid operand for instruction
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@ CHECK: vmov.i32 d2, #0xffffffab
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@ CHECK: error: invalid operand for instruction
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@ CHECK: vmov.i32 q2, #0xffffffab
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@ CHECK: error: invalid operand for instruction
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@ CHECK: vmov.i16 q2, #0xffab
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@ CHECK: error: invalid operand for instruction
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@ CHECK: vmov.i16 q2, #0xffab
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@ CHECK: error: invalid operand for instruction
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@ CHECK: vmvn.i32 d2, #0xffffffab
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@ CHECK: error: invalid operand for instruction
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@ CHECK: vmvn.i32 q2, #0xffffffab
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@ CHECK: error: invalid operand for instruction
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@ CHECK: vmvn.i16 q2, #0xffab
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@ CHECK: error: invalid operand for instruction
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@ CHECK: vmvn.i16 q2, #0xffab
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vmov.i32 d2, #0xffffffab
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vmov.i32 q2, #0xffffffab
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vmov.i16 q2, #0xffab
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vmov.i16 q2, #0xffab
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vmvn.i32 d2, #0xffffffab
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vmvn.i32 q2, #0xffffffab
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vmvn.i16 q2, #0xffab
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vmvn.i16 q2, #0xffab
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