Matthias Braun 3baac7bffc AArch64: Make test more robust. ... Avoid the creation of select instructions which can result in different scheduling of the selects. I also added a bunch of additional store volatiles. Those avoid A CodeGen problem (bug?) where normalizes and denomarlizing the control moves all shift instructions into the first block where ISel can't match them together with the cmps. llvm-svn: 228362		2015-02-05 23:52:14 +00:00
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AArch64	AArch64: Make test more robust.	2015-02-05 23:52:14 +00:00
ARM	[ARM] Use patterns instead of hardcoded regs in test. NFC.	2015-02-05 01:52:19 +00:00
BPF
CPP
Generic
Hexagon	[Hexagon] Simplifying and formatting several patterns. Changing a pattern multiply to be expanded.	2015-02-05 21:13:25 +00:00
Inputs
Mips	[mips][microMIPS] Implement CodeGen support for SW16 and LW16 instructions	2015-02-04 15:43:17 +00:00
MSP430
NVPTX	[NVPTX] Emit .pragma "nounroll" for loops marked with nounroll	2015-02-01 02:27:45 +00:00
PowerPC	[PowerPC] Prepare loops for pre-increment loads/stores	2015-02-05 18:43:00 +00:00
R600	R600/SI: Fix bug in TTI loop unrolling preferences	2015-02-05 15:32:18 +00:00
SPARC
SystemZ
Thumb
Thumb2
X86	X86: Test cleanup	2015-02-05 23:52:12 +00:00
XCore