.. |
AsmParser
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[AMDGPU] SDWA: Add assembler support for GFX9
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2017-05-23 10:08:55 +00:00 |
Disassembler
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[AMDGPU][MC] Corrected disassembler to decode instructions with 2 literals
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2017-05-19 14:27:52 +00:00 |
InstPrinter
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[AMDGPU][MC] Fix for Bug 28211 + LIT tests
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2017-04-07 13:07:13 +00:00 |
MCTargetDesc
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[AMDGPU] SDWA: Add assembler support for GFX9
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2017-05-23 10:08:55 +00:00 |
TargetInfo
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Utils
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Revert "AMDGPU: Fold CI-specific complex SMRD patterns into existing complex patterns"
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2017-05-24 14:53:50 +00:00 |
AMDGPU.h
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[LegacyPassManager] Remove TargetMachine constructors
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2017-05-18 17:21:13 +00:00 |
AMDGPU.td
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[AMDGPU] SDWA: Add assembler support for GFX9
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2017-05-23 10:08:55 +00:00 |
AMDGPUAliasAnalysis.cpp
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[IR] Make getParamAttributes take argument numbers, not ArgNo+1
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2017-04-13 23:12:13 +00:00 |
AMDGPUAliasAnalysis.h
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AMDGPU/R600: Fix amdgpu alias analysis pass.
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2017-03-31 19:26:23 +00:00 |
AMDGPUAlwaysInlinePass.cpp
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[AMDGPU] Add GlobalOpt parameter to Always Inliner pass
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2017-03-30 20:16:02 +00:00 |
AMDGPUAnnotateKernelFeatures.cpp
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[LegacyPassManager] Remove TargetMachine constructors
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2017-05-18 17:21:13 +00:00 |
AMDGPUAnnotateUniformValues.cpp
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[AMDGPU] Get address space mapping by target triple environment
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2017-03-27 14:04:01 +00:00 |
AMDGPUAsmPrinter.cpp
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AMDGPU/AMDHSA: Set COMPUTE_PGM_RSRC2:LDS_SIZE to 0
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2017-05-05 20:13:55 +00:00 |
AMDGPUAsmPrinter.h
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AMDGPU: Refactor AsmPrinter
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2017-05-02 17:14:00 +00:00 |
AMDGPUCallingConv.td
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AMDGPU: Start defining a calling convention
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2017-05-17 21:56:25 +00:00 |
AMDGPUCallLowering.cpp
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[AMDGPU] Get address space mapping by target triple environment
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2017-03-27 14:04:01 +00:00 |
AMDGPUCallLowering.h
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AMDGPU: Start defining a calling convention
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2017-05-17 21:56:25 +00:00 |
AMDGPUCodeGenPrepare.cpp
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[LegacyPassManager] Remove TargetMachine constructors
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2017-05-18 17:21:13 +00:00 |
AMDGPUFrameLowering.cpp
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[AMDGPU] Split R600/SI getFrameIndexReference and emit stack object offsets for SI
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2017-03-10 19:39:07 +00:00 |
AMDGPUFrameLowering.h
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[AMDGPU] Split R600/SI getFrameIndexReference and emit stack object offsets for SI
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2017-03-10 19:39:07 +00:00 |
AMDGPUGenRegisterBankInfo.def
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AMDGPUInstrInfo.cpp
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[AMDGPU] Get address space mapping by target triple environment
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2017-03-27 14:04:01 +00:00 |
AMDGPUInstrInfo.h
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AMDGPU: Fix crash when disassembling VOP3 mac
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2017-04-10 17:58:06 +00:00 |
AMDGPUInstrInfo.td
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AMDGPU: Start defining a calling convention
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2017-05-17 21:56:25 +00:00 |
AMDGPUInstructions.td
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[AMDGPU][MC] Added check for truncation of SOPK imm operand
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2017-04-26 15:34:19 +00:00 |
AMDGPUInstructionSelector.cpp
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AMDGPU: Remove tfe bit from flat instruction definitions
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2017-05-11 17:38:33 +00:00 |
AMDGPUInstructionSelector.h
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[AMDGPU] Get address space mapping by target triple environment
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2017-03-27 14:04:01 +00:00 |
AMDGPUIntrinsicInfo.cpp
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Rename AttributeSet to AttributeList
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2017-03-21 16:57:19 +00:00 |
AMDGPUIntrinsicInfo.h
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AMDGPUIntrinsics.td
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AMDGPU: Remove legacy bfe intrinsics
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2017-04-03 18:08:08 +00:00 |
AMDGPUISelDAGToDAG.cpp
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Revert "AMDGPU: Fold CI-specific complex SMRD patterns into existing complex patterns"
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2017-05-24 14:53:50 +00:00 |
AMDGPUISelLowering.cpp
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[AMDGPU] Combine and (srl) into shl (bfe)
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2017-05-23 19:54:48 +00:00 |
AMDGPUISelLowering.h
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[AMDGPU] Convert shl (add) into add (shl)
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2017-05-23 15:59:58 +00:00 |
AMDGPULegalizerInfo.cpp
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AMDGPU/GlobalISel: Mark 32-bit integer constants as legal
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2017-05-12 16:46:46 +00:00 |
AMDGPULegalizerInfo.h
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AMDGPULowerIntrinsics.cpp
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[LegacyPassManager] Remove TargetMachine constructors
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2017-05-18 17:21:13 +00:00 |
AMDGPUMachineCFGStructurizer.cpp
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AMDGPUCodeGen: Fix warnings in r303111. [-Wunused-variable]
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2017-05-16 04:01:23 +00:00 |
AMDGPUMachineFunction.cpp
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AMDGPU: Start defining a calling convention
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2017-05-17 21:56:25 +00:00 |
AMDGPUMachineFunction.h
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AMDGPU: Rename isKernel
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2017-03-30 23:58:04 +00:00 |
AMDGPUMCInstLower.cpp
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AMDGPU: Start defining a calling convention
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2017-05-17 21:56:25 +00:00 |
AMDGPUMCInstLower.h
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AMDGPUOpenCLImageTypeLoweringPass.cpp
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AMDGPUPromoteAlloca.cpp
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AMDGPU/SI: Move the local memory usage related checking after calling convention checking in PromoteAlloca
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2017-05-23 20:25:41 +00:00 |
AMDGPUPTNote.h
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[AMDGPU] Restructure code object metadata creation
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2017-03-22 22:32:22 +00:00 |
AMDGPURegisterBankInfo.cpp
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[RegisterBankInfo] Uniquely allocate instruction mapping.
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2017-05-05 22:48:22 +00:00 |
AMDGPURegisterBankInfo.h
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[RegisterBankInfo] Uniquely allocate instruction mapping.
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2017-05-05 22:48:22 +00:00 |
AMDGPURegisterBanks.td
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AMDGPURegisterInfo.cpp
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AMDGPU: Start defining a calling convention
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2017-05-17 21:56:25 +00:00 |
AMDGPURegisterInfo.h
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AMDGPU: Start defining a calling convention
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2017-05-17 21:56:25 +00:00 |
AMDGPURegisterInfo.td
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AMDGPUSubtarget.cpp
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AMDGPU: Add new subtarget features for gfx9 flat instructions
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2017-05-10 21:19:05 +00:00 |
AMDGPUSubtarget.h
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Revert "AMDGPU: Fold CI-specific complex SMRD patterns into existing complex patterns"
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2017-05-24 14:53:50 +00:00 |
AMDGPUTargetMachine.cpp
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[LegacyPassManager] Remove TargetMachine constructors
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2017-05-18 17:21:13 +00:00 |
AMDGPUTargetMachine.h
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[AMDGPU] Get address space mapping by target triple environment
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2017-03-27 14:04:01 +00:00 |
AMDGPUTargetObjectFile.cpp
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[AMDGPU] Get address space mapping by target triple environment
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2017-03-27 14:04:01 +00:00 |
AMDGPUTargetObjectFile.h
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[AMDGPU] Get address space mapping by target triple environment
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2017-03-27 14:04:01 +00:00 |
AMDGPUTargetTransformInfo.cpp
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AMDGPU: Make some packed shuffles free
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2017-05-10 21:29:33 +00:00 |
AMDGPUTargetTransformInfo.h
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AMDGPU: Make some packed shuffles free
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2017-05-10 21:29:33 +00:00 |
AMDGPUUnifyDivergentExitNodes.cpp
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AMDGPU: Unify divergent function exits.
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2017-03-24 19:52:05 +00:00 |
AMDGPUUnifyMetadata.cpp
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AMDILCFGStructurizer.cpp
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Remove unused functions. Remove static qualifier from functions in header files. NFC.
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2017-04-11 14:55:32 +00:00 |
AMDKernelCodeT.h
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BUFInstructions.td
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AMDGPU: Change mubuf soffset register when SP relative
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2017-05-17 21:02:58 +00:00 |
CaymanInstructions.td
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CIInstructions.td
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CMakeLists.txt
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Re-submit AMDGPUMachineCFGStructurizer.
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2017-05-15 20:18:37 +00:00 |
DSInstructions.td
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Revert earlier change. ds permute operations affect lgkm counter.
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2017-04-19 23:39:19 +00:00 |
EvergreenInstructions.td
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AMDGPU: Fix unnecessary ands when packing f16 vectors
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2017-03-15 19:04:26 +00:00 |
FLATInstructions.td
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AMDGPU: Remove tfe bit from flat instruction definitions
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2017-05-11 17:38:33 +00:00 |
GCNHazardRecognizer.cpp
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AMDGPU: Fix broken condition in hazard recognizer
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2017-03-17 21:36:28 +00:00 |
GCNHazardRecognizer.h
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AMDGPU: Fix broken condition in hazard recognizer
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2017-03-17 21:36:28 +00:00 |
GCNIterativeScheduler.cpp
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[AMDGPU] Iterative scheduling infrastructure + minimal registry scheduler
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2017-03-21 13:15:46 +00:00 |
GCNIterativeScheduler.h
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[AMDGPU] Iterative scheduling infrastructure + minimal registry scheduler
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2017-03-21 13:15:46 +00:00 |
GCNMinRegStrategy.cpp
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[AMDGPU] Iterative scheduling infrastructure + minimal registry scheduler
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2017-03-21 13:15:46 +00:00 |
GCNRegPressure.cpp
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[AMDGPU] Fix incorrect register usage tracking in GCNUpwardTracker
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2017-05-22 13:09:40 +00:00 |
GCNRegPressure.h
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[AMDGPU] Fix incorrect register usage tracking in GCNUpwardTracker
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2017-05-22 13:09:40 +00:00 |
GCNSchedStrategy.cpp
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[AMDGPU] Use GCNRPTracker dumper methods in scheduler
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2017-05-16 16:31:45 +00:00 |
GCNSchedStrategy.h
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[AMDGPU] Cache live-ins and register pressure in scheduler
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2017-05-16 16:11:26 +00:00 |
LLVMBuild.txt
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MIMGInstructions.td
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AMDGPU: Remove legacy image intrinsics
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2017-04-04 16:34:35 +00:00 |
Processors.td
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R600ClauseMergePass.cpp
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[LegacyPassManager] Remove TargetMachine constructors
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2017-05-18 17:21:13 +00:00 |
R600ControlFlowFinalizer.cpp
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[LegacyPassManager] Remove TargetMachine constructors
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2017-05-18 17:21:13 +00:00 |
R600Defines.h
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R600EmitClauseMarkers.cpp
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R600ExpandSpecialInstrs.cpp
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[LegacyPassManager] Remove TargetMachine constructors
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2017-05-18 17:21:13 +00:00 |
R600FrameLowering.cpp
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[AMDGPU] Split R600/SI getFrameIndexReference and emit stack object offsets for SI
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2017-03-10 19:39:07 +00:00 |
R600FrameLowering.h
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[AMDGPU] Split R600/SI getFrameIndexReference and emit stack object offsets for SI
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2017-03-10 19:39:07 +00:00 |
R600InstrFormats.td
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R600InstrInfo.cpp
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Cyle -> Cycle; NFCI
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2017-03-15 15:37:42 +00:00 |
R600InstrInfo.h
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Cyle -> Cycle; NFCI
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2017-03-15 15:37:42 +00:00 |
R600Instructions.td
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[AMDGPU] Get address space mapping by target triple environment
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2017-03-27 14:04:01 +00:00 |
R600Intrinsics.td
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AMDGPU: Make intrinsics speculatable
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2017-05-02 16:57:44 +00:00 |
R600ISelLowering.cpp
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[AMDGPU] Prevent too large store merges in AMDGPU Subtargets. NFCI.
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2017-05-24 15:59:09 +00:00 |
R600ISelLowering.h
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[AMDGPU] Prevent too large store merges in AMDGPU Subtargets. NFCI.
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2017-05-24 15:59:09 +00:00 |
R600MachineFunctionInfo.cpp
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R600MachineFunctionInfo.h
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R600MachineScheduler.cpp
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R600MachineScheduler.h
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R600OptimizeVectorRegisters.cpp
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[LegacyPassManager] Remove TargetMachine constructors
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2017-05-18 17:21:13 +00:00 |
R600Packetizer.cpp
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[LegacyPassManager] Remove TargetMachine constructors
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2017-05-18 17:21:13 +00:00 |
R600RegisterInfo.cpp
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AMDGPU: Start defining a calling convention
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2017-05-17 21:56:25 +00:00 |
R600RegisterInfo.h
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AMDGPU: Start defining a calling convention
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2017-05-17 21:56:25 +00:00 |
R600RegisterInfo.td
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[AMDGPU] Add INDIRECT_BASE_ADDR to R600_Reg32 class (PR33045)
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2017-05-23 21:27:15 +00:00 |
R600Schedule.td
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R700Instructions.td
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SIAnnotateControlFlow.cpp
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Remove now useless trailing nullptr in StructType::get
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2017-05-11 08:46:02 +00:00 |
SIDebuggerInsertNops.cpp
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SIDefines.h
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[AMDGPU] SDWA: Add assembler support for GFX9
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2017-05-23 10:08:55 +00:00 |
SIFixControlFlowLiveIntervals.cpp
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SIFixSGPRCopies.cpp
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AMDGPU: Fix copies from physical registers in SIFixSGPRCopies
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2017-04-29 01:26:34 +00:00 |
SIFixVGPRCopies.cpp
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SIFoldOperands.cpp
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[AMDGPU] SDWA Peephole: improve search for immediates in SDWA patterns
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2017-03-31 11:42:43 +00:00 |
SIFrameLowering.cpp
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AMDGPU: Start defining a calling convention
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2017-05-17 21:56:25 +00:00 |
SIFrameLowering.h
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AMDGPU: Start defining a calling convention
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2017-05-17 21:56:25 +00:00 |
SIInsertSkips.cpp
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AMDGPU: Rename SI_RETURN
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2017-03-21 22:18:10 +00:00 |
SIInsertWaitcnts.cpp
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[AMDGPU] In the new waitcnt insertion pass, use getHeader
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2017-05-05 21:10:17 +00:00 |
SIInsertWaits.cpp
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Move size and alignment information of regclass to TargetRegisterInfo
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2017-04-24 18:55:33 +00:00 |
SIInstrFormats.td
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[AMDGPU][MC] Fixed bugs in export instruction
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2017-05-19 13:36:09 +00:00 |
SIInstrInfo.cpp
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AMDGPU: Use appropriate soffset for spilling
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2017-05-17 19:37:57 +00:00 |
SIInstrInfo.h
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Re-submit AMDGPUMachineCFGStructurizer.
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2017-05-15 20:18:37 +00:00 |
SIInstrInfo.td
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[AMDGPU] SDWA: Add assembler support for GFX9
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2017-05-23 10:08:55 +00:00 |
SIInstructions.td
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Re-submit AMDGPUMachineCFGStructurizer.
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2017-05-15 20:18:37 +00:00 |
SIIntrinsics.td
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AMDGPU: Remove legacy export intrinsic
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2017-04-04 16:34:39 +00:00 |
SIISelLowering.cpp
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[AMDGPU] Prevent too large store merges in AMDGPU Subtargets. NFCI.
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2017-05-24 15:59:09 +00:00 |
SIISelLowering.h
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[AMDGPU] Prevent too large store merges in AMDGPU Subtargets. NFCI.
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2017-05-24 15:59:09 +00:00 |
SILoadStoreOptimizer.cpp
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[LegacyPassManager] Remove TargetMachine constructors
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2017-05-18 17:21:13 +00:00 |
SILowerControlFlow.cpp
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SILowerI1Copies.cpp
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SIMachineFunctionInfo.cpp
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AMDGPU: Start defining a calling convention
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2017-05-17 21:56:25 +00:00 |
SIMachineFunctionInfo.h
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AMDGPU: Start defining a calling convention
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2017-05-17 21:56:25 +00:00 |
SIMachineScheduler.cpp
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[AMDGPU] Update SI scheduler colorHighLatenciesGroups
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2017-03-28 07:19:48 +00:00 |
SIMachineScheduler.h
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[AMDGPU] Update SI scheduler colorHighLatenciesGroups
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2017-03-28 07:19:48 +00:00 |
SIOptimizeExecMasking.cpp
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SIPeepholeSDWA.cpp
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[AMDGPU] SDWA operands should not intersect with potential MIs
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2017-05-18 12:12:03 +00:00 |
SIRegisterInfo.cpp
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AMDGPU: Start defining a calling convention
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2017-05-17 21:56:25 +00:00 |
SIRegisterInfo.h
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AMDGPU: Start defining a calling convention
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2017-05-17 21:56:25 +00:00 |
SIRegisterInfo.td
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AMDGPU: Fix not including v2i16/v2f16 in register class
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2017-03-21 16:42:50 +00:00 |
SISchedule.td
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SIShrinkInstructions.cpp
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SITypeRewriter.cpp
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SIWholeQuadMode.cpp
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SMInstructions.td
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Revert "AMDGPU: Fold CI-specific complex SMRD patterns into existing complex patterns"
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2017-05-24 14:53:50 +00:00 |
SOPInstructions.td
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Revert r303859, CodeGen/AMDGPU/llvm.amdgcn.s.getpc.ll fails on bots.
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2017-05-25 19:19:29 +00:00 |
VIInstrFormats.td
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VIInstructions.td
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VOP1Instructions.td
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[AMDGPU] SDWA: Add assembler support for GFX9
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2017-05-23 10:08:55 +00:00 |
VOP2Instructions.td
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[AMDGPU] SDWA: Add assembler support for GFX9
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2017-05-23 10:08:55 +00:00 |
VOP3Instructions.td
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[AMDGPU] SDWA: Add assembler support for GFX9
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2017-05-23 10:08:55 +00:00 |
VOP3PInstructions.td
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VOPCInstructions.td
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[AMDGPU] SDWA: Add assembler support for GFX9
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2017-05-23 10:08:55 +00:00 |
VOPInstructions.td
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[AMDGPU] SDWA: Add assembler support for GFX9
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2017-05-23 10:08:55 +00:00 |