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d4c615be8c
Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
54 lines
1.4 KiB
YAML
54 lines
1.4 KiB
YAML
# RUN: llc -march=hexagon -eif-limit=4 -run-pass hexagon-early-if -o - %s | FileCheck %s
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# Check that even with the limit of 4 instructions, the block bb.1 is
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# if-converted.
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# CHECK-LABEL: bb.0:
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# CHECK: %0:intregs = COPY $r0
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# CHECK: %1:predregs = C2_cmpeqi %0, 0
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# CHECK: %2:intregs = A2_tfrsi 123
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# CHECK: DBG_VALUE debug-use %0, debug-use $noreg
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# CHECK: DBG_VALUE debug-use %0, debug-use $noreg
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# CHECK: DBG_VALUE debug-use %0, debug-use $noreg
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# CHECK: DBG_VALUE debug-use %0, debug-use $noreg
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# CHECK: DBG_VALUE debug-use %0, debug-use $noreg
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# CHECK: %3:intregs = A2_tfrsi 321
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# CHECK: %5:intregs = C2_mux %1, %2, %3
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--- |
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define void @foo() {
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ret void
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}
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!1 = !DIExpression()
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...
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---
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name: foo
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tracksRegLiveness: true
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registers:
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- { id: 0, class: intregs }
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- { id: 1, class: predregs }
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- { id: 2, class: intregs }
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- { id: 3, class: intregs }
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- { id: 4, class: intregs }
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body: |
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bb.0:
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liveins: $r0
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%0 = COPY $r0
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%1 = C2_cmpeqi %0, 0
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%2 = A2_tfrsi 123
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J2_jumpt %1, %bb.2, implicit-def dead $pc
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J2_jump %bb.1, implicit-def dead $pc
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bb.1:
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DBG_VALUE debug-use %0, debug-use $noreg, !1, !1
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DBG_VALUE debug-use %0, debug-use $noreg, !1, !1
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DBG_VALUE debug-use %0, debug-use $noreg, !1, !1
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DBG_VALUE debug-use %0, debug-use $noreg, !1, !1
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DBG_VALUE debug-use %0, debug-use $noreg, !1, !1
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%3 = A2_tfrsi 321
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bb.2:
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%4 = PHI %2, %bb.0, %3, %bb.1
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...
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