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c361988412
Reviewers: fhahn, rengolin, t.p.northover, echristo, olista01, SjoerdMeijer Reviewed By: SjoerdMeijer Subscribers: SjoerdMeijer, aemerson, javed.absar, tschuett, kristof.beyls, llvm-commits Differential Revision: https://reviews.llvm.org/D41900 llvm-svn: 322951
33 lines
1.2 KiB
TableGen
33 lines
1.2 KiB
TableGen
//=- AArch64SVEInstrInfo.td - AArch64 SVE Instructions -*- tablegen -*-----=//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// AArch64 Scalable Vector Extension (SVE) Instruction definitions.
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//
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//===----------------------------------------------------------------------===//
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let Predicates = [HasSVE] in {
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defm ADD_ZZZ : sve_int_bin_cons_arit_0<0b000, "add">;
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defm SUB_ZZZ : sve_int_bin_cons_arit_0<0b001, "sub">;
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defm ADD_ZPmZ : sve_int_bin_pred_arit_0<0b000, "add">;
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defm SUB_ZPmZ : sve_int_bin_pred_arit_0<0b001, "sub">;
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defm ZIP1_ZZZ : sve_int_perm_bin_perm_zz<0b000, "zip1">;
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defm ZIP2_ZZZ : sve_int_perm_bin_perm_zz<0b001, "zip2">;
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defm ZIP1_PPP : sve_int_perm_bin_perm_pp<0b000, "zip1">;
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defm ZIP2_PPP : sve_int_perm_bin_perm_pp<0b001, "zip2">;
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defm DUP_ZR : sve_int_perm_dup_r<"dup">;
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def RDVLI_XI : sve_int_read_vl_a<0b0, 0b11111, "rdvl">;
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def ADDVL_XXI : sve_int_arith_vl<0b0, "addvl">;
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def ADDPL_XXI : sve_int_arith_vl<0b1, "addpl">;
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}
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