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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-22 20:43:44 +02:00
llvm-mirror/test/CodeGen
2014-08-21 09:43:43 +00:00
..
AArch64 Revert r216066, "Optimize ZERO_EXTEND and SIGN_EXTEND in both SelectionDAG Builder and type". 2014-08-21 01:59:30 +00:00
ARM [PeepholeOptimizer] Take advantage of the isInsertSubreg property in the 2014-08-21 00:19:16 +00:00
CPP
Generic Use "weak alias" instead of "alias weak" 2014-07-30 22:51:54 +00:00
Hexagon DebugInfo: Assert that any CU for which debug_loc lists are emitted, has at least one range. 2014-08-06 00:21:25 +00:00
Inputs
Mips Fix fmul combines with constant splat vectors 2014-08-16 10:14:19 +00:00
MSP430
NVPTX
PowerPC Reapply [FastISel] Let the target decide first if it wants to materialize a constant (215588). 2014-08-19 19:05:24 +00:00
R600 R600/SI: Move all fabs / fneg handling to patterns 2014-08-15 18:42:22 +00:00
SPARC
SystemZ
Thumb Lower thumbv4t & thumbv5 lo->lo copies through a push-pop sequence 2014-08-20 23:38:50 +00:00
Thumb2 ARM: do not generate BLX instructions on Cortex-M CPUs. 2014-08-06 11:13:14 +00:00
X86 [x86] Added _addcarry_ and _subborrow_ intrinsics 2014-08-21 09:43:43 +00:00
XCore