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556791680d
Summary: The bugs were: * append, prepend, and balign were not tested * balign takes a uimm2 not a uimm5. * drotr32 was correctly implemented with a uimm5 but the tests expected '52' to be valid. * li/la were implemented with a uimm5 instead of simm32. simm32 isn't completely correct either but I'll fix that when I get to simm32. A notable omission are some of the shift instructions. Several of these have been implemented using a single uimm6 instruction (rather than two uimm5 instructions and a CodeGen-only uimm6 pseudo). These will be updated in the uimm6 patch. Reviewers: vkalintiris Subscribers: llvm-commits, dsanders Differential Revision: http://reviews.llvm.org/D14712 llvm-svn: 254164 |
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invalid-mips1-wrong-error.s | ||
invalid-mips1.s | ||
invalid-mips2.s | ||
invalid-mips3-wrong-error.s | ||
invalid-mips3.s | ||
invalid-mips4-wrong-error.s | ||
invalid-mips4.s | ||
invalid-mips5-wrong-error.s | ||
invalid-mips5.s | ||
invalid-mips32-wrong-error.s | ||
invalid-mips64.s | ||
invalid.s | ||
relocations.s | ||
valid-xfail.s | ||
valid.s |