Konstantin Zhuravlyov ec13d639b3 AMDGPU: Add num spilled s/vgprs to metadata ... This was requested by tools. Differential Revision: https://reviews.llvm.org/D40321 llvm-svn: 319192		2017-11-28 17:51:08 +00:00
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AArch64	Revert r318759 due to make check-all failure on Windows	2017-11-21 15:07:43 +00:00
AMDGPU	AMDGPU: Add num spilled s/vgprs to metadata	2017-11-28 17:51:08 +00:00
ARM	[ARM] Remove pre-UAL FLDM/FSTM aliases	2017-11-21 16:20:25 +00:00
AsmParser	[MC] Fix regression tests on Windows when git “core.autocrlf” is set to true.	2017-11-17 21:59:43 +00:00
AVR	[AVR] Use the short form of 'clr <reg>'	2017-11-24 15:36:43 +00:00
BPF	bpf: print backward branch target properly	2017-11-16 19:15:36 +00:00
COFF	[CodeGen] Print register names in lowercase in both MIR and debug output	2017-11-28 17:15:09 +00:00
Disassembler	[AMDGPU][MC][DISASSEMBLER][GFX9] Corrected decoding of GLOBAL/SCRATCH opcodes	2017-11-27 17:14:35 +00:00
ELF	[DWARF] Fix handling of extended line-number opcodes	2017-11-22 15:14:49 +00:00
Hexagon	[Hexagon] Remove trailing spaces, NFC	2017-11-22 20:43:00 +00:00
Lanai
MachO	[dwarfdump] Add verbose output for .debug-line section	2017-09-21 20:15:30 +00:00
Markup
Mips	[mips] Set microMIPS ASE flag	2017-11-24 14:00:47 +00:00
PowerPC	PowerPC: support the separator character in the IAS	2017-10-24 16:19:56 +00:00
RISCV	[RISCV] MC layer support for the standard RV32A instruction set extension	2017-11-09 15:00:03 +00:00
Sparc	[Sparc] invalid adjustments in TLS_LE/TLS_LDO relocations removed	2017-07-25 15:28:28 +00:00
SystemZ	[SystemZ, AsmParser] Enable the mnemonic spell corrector.	2017-07-18 09:17:00 +00:00
WebAssembly	[WebAssembly] MC: Don't allow zero sized data segments	2017-10-27 00:08:55 +00:00
X86	[CodeGen] Print register names in lowercase in both MIR and debug output	2017-11-28 17:15:09 +00:00