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https://github.com/RPCS3/llvm-mirror.git
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5efe040582
Initialize all AArch64-specific passes in the TargetMachine so they can be run by llc. This can lead to conflicts in opt with some command line options that share the same name as the pass, so I took this opportunity to do some cleanups: * rename all relevant command line options from "aarch64-blah" to "aarch64-enable-blah" and update the tests accordingly * run clang-format on their declarations * move all these declarations to a common place (the TargetMachine) as opposed to having them scattered around (AArch64BranchRelaxation and AArch64AddressTypePromotion were the only offenders) llvm-svn: 277322
126 lines
4.4 KiB
LLVM
126 lines
4.4 KiB
LLVM
; RUN: llc < %s -mtriple=aarch64-eabi -aarch64-neon-syntax=apple -aarch64-enable-stp-suppress=false -verify-machineinstrs -asm-verbose=false | FileCheck %s
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; CHECK-LABEL: test_strd_sturd:
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; CHECK-NEXT: stp d0, d1, [x0, #-8]
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; CHECK-NEXT: ret
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define void @test_strd_sturd(float* %ptr, <2 x float> %v1, <2 x float> %v2) #0 {
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%tmp1 = bitcast float* %ptr to <2 x float>*
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store <2 x float> %v2, <2 x float>* %tmp1, align 16
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%add.ptr = getelementptr inbounds float, float* %ptr, i64 -2
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%tmp = bitcast float* %add.ptr to <2 x float>*
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store <2 x float> %v1, <2 x float>* %tmp, align 16
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ret void
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}
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; CHECK-LABEL: test_sturd_strd:
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; CHECK-NEXT: stp d0, d1, [x0, #-8]
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; CHECK-NEXT: ret
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define void @test_sturd_strd(float* %ptr, <2 x float> %v1, <2 x float> %v2) #0 {
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%add.ptr = getelementptr inbounds float, float* %ptr, i64 -2
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%tmp = bitcast float* %add.ptr to <2 x float>*
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store <2 x float> %v1, <2 x float>* %tmp, align 16
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%tmp1 = bitcast float* %ptr to <2 x float>*
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store <2 x float> %v2, <2 x float>* %tmp1, align 16
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ret void
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}
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; CHECK-LABEL: test_strq_sturq:
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; CHECK-NEXT: stp q0, q1, [x0, #-16]
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; CHECK-NEXT: ret
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define void @test_strq_sturq(double* %ptr, <2 x double> %v1, <2 x double> %v2) #0 {
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%tmp1 = bitcast double* %ptr to <2 x double>*
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store <2 x double> %v2, <2 x double>* %tmp1, align 16
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%add.ptr = getelementptr inbounds double, double* %ptr, i64 -2
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%tmp = bitcast double* %add.ptr to <2 x double>*
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store <2 x double> %v1, <2 x double>* %tmp, align 16
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ret void
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}
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; CHECK-LABEL: test_sturq_strq:
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; CHECK-NEXT: stp q0, q1, [x0, #-16]
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; CHECK-NEXT: ret
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define void @test_sturq_strq(double* %ptr, <2 x double> %v1, <2 x double> %v2) #0 {
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%add.ptr = getelementptr inbounds double, double* %ptr, i64 -2
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%tmp = bitcast double* %add.ptr to <2 x double>*
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store <2 x double> %v1, <2 x double>* %tmp, align 16
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%tmp1 = bitcast double* %ptr to <2 x double>*
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store <2 x double> %v2, <2 x double>* %tmp1, align 16
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ret void
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}
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; CHECK-LABEL: test_ldrx_ldurx:
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; CHECK-NEXT: ldp [[V0:x[0-9]+]], [[V1:x[0-9]+]], [x0, #-8]
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; CHECK-NEXT: add x0, [[V0]], [[V1]]
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; CHECK-NEXT: ret
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define i64 @test_ldrx_ldurx(i64* %p) #0 {
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%tmp = load i64, i64* %p, align 4
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%add.ptr = getelementptr inbounds i64, i64* %p, i64 -1
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%tmp1 = load i64, i64* %add.ptr, align 4
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%add = add nsw i64 %tmp1, %tmp
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ret i64 %add
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}
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; CHECK-LABEL: test_ldurx_ldrx:
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; CHECK-NEXT: ldp [[V0:x[0-9]+]], [[V1:x[0-9]+]], [x0, #-8]
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; CHECK-NEXT: add x0, [[V0]], [[V1]]
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; CHECK-NEXT: ret
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define i64 @test_ldurx_ldrx(i64* %p) #0 {
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%add.ptr = getelementptr inbounds i64, i64* %p, i64 -1
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%tmp1 = load i64, i64* %add.ptr, align 4
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%tmp = load i64, i64* %p, align 4
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%add = add nsw i64 %tmp1, %tmp
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ret i64 %add
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}
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; CHECK-LABEL: test_ldrsw_ldursw:
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; CHECK-NEXT: ldpsw [[V0:x[0-9]+]], [[V1:x[0-9]+]], [x0, #-4]
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; CHECK-NEXT: add x0, [[V0]], [[V1]]
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; CHECK-NEXT: ret
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define i64 @test_ldrsw_ldursw(i32* %p) #0 {
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%tmp = load i32, i32* %p, align 4
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%add.ptr = getelementptr inbounds i32, i32* %p, i64 -1
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%tmp1 = load i32, i32* %add.ptr, align 4
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%sexttmp = sext i32 %tmp to i64
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%sexttmp1 = sext i32 %tmp1 to i64
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%add = add nsw i64 %sexttmp1, %sexttmp
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ret i64 %add
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}
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; Also make sure we only match valid offsets.
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; CHECK-LABEL: test_ldrq_ldruq_invalidoffset:
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; CHECK-NEXT: ldr q[[V0:[0-9]+]], [x0]
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; CHECK-NEXT: ldur q[[V1:[0-9]+]], [x0, #24]
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; CHECK-NEXT: add.2d v0, v[[V0]], v[[V1]]
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; CHECK-NEXT: ret
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define <2 x i64> @test_ldrq_ldruq_invalidoffset(i64* %p) #0 {
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%a1 = bitcast i64* %p to <2 x i64>*
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%tmp1 = load <2 x i64>, < 2 x i64>* %a1, align 8
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%add.ptr2 = getelementptr inbounds i64, i64* %p, i64 3
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%a2 = bitcast i64* %add.ptr2 to <2 x i64>*
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%tmp2 = load <2 x i64>, <2 x i64>* %a2, align 8
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%add = add nsw <2 x i64> %tmp1, %tmp2
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ret <2 x i64> %add
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}
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; Pair an unscaled store with a scaled store where the scaled store has a
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; non-zero offset. This should not hit an assert.
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; CHECK-LABEL: test_stur_str_no_assert
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; CHECK: stp xzr, xzr, [sp, #16]
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; CHECK: ret
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define void @test_stur_str_no_assert() #0 {
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entry:
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%a1 = alloca i64, align 4
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%a2 = alloca [12 x i8], align 4
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%0 = bitcast i64* %a1 to i8*
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%C = getelementptr inbounds [12 x i8], [12 x i8]* %a2, i64 0, i64 4
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%1 = bitcast i8* %C to i64*
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store i64 0, i64* %1, align 4
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call void @llvm.memset.p0i8.i64(i8* %0, i8 0, i64 8, i32 8, i1 false)
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ret void
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}
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declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1)
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attributes #0 = { nounwind }
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