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a19aa0bc03
Intrinsic already existed for llvm.SI.tbuffer.store Needed tbuffer.load and also re-implementing the intrinsic as llvm.amdgcn.tbuffer.* Added CodeGen tests for the 2 new variants added. Left the original llvm.SI.tbuffer.store implementation to avoid issues with existing code Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, tony-tye, tpr Differential Revision: https://reviews.llvm.org/D30687 llvm-svn: 306031
24 lines
816 B
LLVM
24 lines
816 B
LLVM
; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck %s
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; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck %s
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; CHECK-LABEL: {{^}}test1:
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; CHECK: ds_write_b32
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; CHECK: ds_read_b32
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; CHECK: ds_write_b32
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define amdgpu_vs void @test1(i32 %v) #0 {
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%p0 = getelementptr i32, i32 addrspace(3)* null, i32 0
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%p1 = getelementptr i32, i32 addrspace(3)* null, i32 1
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store i32 %v, i32 addrspace(3)* %p0
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call void @llvm.amdgcn.tbuffer.store.i32(i32 %v, <4 x i32> undef, i32 0, i32 0, i32 0, i32 0, i32 4, i32 4, i1 1, i1 0)
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%w = load i32, i32 addrspace(3)* %p0
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store i32 %w, i32 addrspace(3)* %p1
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ret void
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}
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declare void @llvm.amdgcn.tbuffer.store.i32(i32, <4 x i32>, i32, i32, i32, i32, i32, i32, i1, i1) #0
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attributes #0 = { nounwind }
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