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https://github.com/RPCS3/llvm-mirror.git
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719b0399a8
since bpf instruction set was introduced people learned to read and understand kernel verifier output whereas llvm asm output stayed obscure and unknown. Convert llvm to emit assembler text similar to kernel to avoid this discrepancy Signed-off-by: Alexei Starovoitov <ast@kernel.org> llvm-svn: 287300
101 lines
2.9 KiB
LLVM
101 lines
2.9 KiB
LLVM
; RUN: llc < %s -march=bpfel -show-mc-encoding | FileCheck %s
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define zeroext i8 @lshr8(i8 zeroext %a, i8 zeroext %cnt) nounwind readnone {
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entry:
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; CHECK-LABEL: lshr8:
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; CHECK: r1 >>= r2 # encoding: [0x7f,0x21,0x00,0x00,0x00,0x00,0x00,0x00]
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%shr = lshr i8 %a, %cnt
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ret i8 %shr
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}
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define signext i8 @ashr8(i8 signext %a, i8 zeroext %cnt) nounwind readnone {
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entry:
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; CHECK-LABEL: ashr8:
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; CHECK: r1 s>>= r2 # encoding: [0xcf,0x21,0x00,0x00,0x00,0x00,0x00,0x00]
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%shr = ashr i8 %a, %cnt
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ret i8 %shr
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}
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define zeroext i8 @shl8(i8 zeroext %a, i8 zeroext %cnt) nounwind readnone {
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entry:
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; CHECK: shl8
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; CHECK: r1 <<= r2 # encoding: [0x6f,0x21,0x00,0x00,0x00,0x00,0x00,0x00]
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%shl = shl i8 %a, %cnt
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ret i8 %shl
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}
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define zeroext i16 @lshr16(i16 zeroext %a, i16 zeroext %cnt) nounwind readnone {
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entry:
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; CHECK-LABEL: lshr16:
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; CHECK: r1 >>= r2 # encoding: [0x7f,0x21,0x00,0x00,0x00,0x00,0x00,0x00]
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%shr = lshr i16 %a, %cnt
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ret i16 %shr
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}
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define signext i16 @ashr16(i16 signext %a, i16 zeroext %cnt) nounwind readnone {
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entry:
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; CHECK-LABEL: ashr16:
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; CHECK: r1 s>>= r2 # encoding: [0xcf,0x21,0x00,0x00,0x00,0x00,0x00,0x00]
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%shr = ashr i16 %a, %cnt
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ret i16 %shr
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}
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define zeroext i16 @shl16(i16 zeroext %a, i16 zeroext %cnt) nounwind readnone {
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entry:
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; CHECK-LABEL: shl16:
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; CHECK: r1 <<= r2 # encoding: [0x6f,0x21,0x00,0x00,0x00,0x00,0x00,0x00]
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%shl = shl i16 %a, %cnt
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ret i16 %shl
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}
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define zeroext i32 @lshr32(i32 zeroext %a, i32 zeroext %cnt) nounwind readnone {
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entry:
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; CHECK-LABEL: lshr32:
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; CHECK: r1 >>= r2 # encoding: [0x7f,0x21,0x00,0x00,0x00,0x00,0x00,0x00]
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; CHECK: r1 <<= 32 # encoding: [0x67,0x01,0x00,0x00,0x20,0x00,0x00,0x00]
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%shr = lshr i32 %a, %cnt
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ret i32 %shr
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}
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define signext i32 @ashr32(i32 signext %a, i32 zeroext %cnt) nounwind readnone {
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entry:
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; CHECK-LABEL: ashr32:
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; CHECK: r1 s>>= r2 # encoding: [0xcf,0x21,0x00,0x00,0x00,0x00,0x00,0x00]
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%shr = ashr i32 %a, %cnt
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ret i32 %shr
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}
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define zeroext i32 @shl32(i32 zeroext %a, i32 zeroext %cnt) nounwind readnone {
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entry:
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; CHECK-LABEL: shl32:
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; CHECK: r1 <<= r2 # encoding: [0x6f,0x21,0x00,0x00,0x00,0x00,0x00,0x00]
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%shl = shl i32 %a, %cnt
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ret i32 %shl
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}
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define zeroext i64 @lshr64(i64 zeroext %a, i64 zeroext %cnt) nounwind readnone {
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entry:
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; CHECK-LABEL: lshr64:
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; CHECK: r1 >>= r2 # encoding: [0x7f,0x21,0x00,0x00,0x00,0x00,0x00,0x00]
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%shr = lshr i64 %a, %cnt
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ret i64 %shr
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}
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define signext i64 @ashr64(i64 signext %a, i64 zeroext %cnt) nounwind readnone {
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entry:
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; CHECK-LABEL: ashr64:
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; CHECK: r1 s>>= r2 # encoding: [0xcf,0x21,0x00,0x00,0x00,0x00,0x00,0x00]
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%shr = ashr i64 %a, %cnt
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ret i64 %shr
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}
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define zeroext i64 @shl64(i64 zeroext %a, i64 zeroext %cnt) nounwind readnone {
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entry:
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; CHECK-LABEL: shl64:
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; CHECK: r1 <<= r2 # encoding: [0x6f,0x21,0x00,0x00,0x00,0x00,0x00,0x00]
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; CHECK: r0 = r1 # encoding: [0xbf,0x10,0x00,0x00,0x00,0x00,0x00,0x00]
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; CHECK: exit # encoding: [0x95,0x00,0x00,0x00,0x00,0x00,0x00,0x00]
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%shl = shl i64 %a, %cnt
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ret i64 %shl
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}
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