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llvm-mirror/lib/Target/AArch64
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Jessica Paquette fb07198b1d [AArch64][GlobalISel] Change store value type from p0 -> s64 to import patterns 
Similar to the G_PTR_ADD + G_LOAD twiddling we do in `preISelLower`.

The imported patterns expect scalars only, so they can't handle things like

```
 G_STORE %ptr1, %ptr2
```

To get around this, use s64 instead.

(This probably makes a good portion of the manual selection code for G_STORE
dead.)

This is a 0.2% geomean code size improvement on CTMark at -Os.

(Best is consumer-typeset @ -0.7%)

Differential Revision: https://reviews.llvm.org/D95908
2021-02-03 16:19:16 -08:00
..
AsmParser
MC: AArch64: Add support for gotpage_lo15
2021-01-21 08:29:49 -03:00
Disassembler
[AArch64] Adding the v8.7-A LD64B/ST64B Accelerator extension
2020-12-17 13:46:23 +00:00
GISel
[AArch64][GlobalISel] Change store value type from p0 -> s64 to import patterns
2021-02-03 16:19:16 -08:00
MCTargetDesc
MC: AArch64: Add support for gotpage_lo15
2021-01-21 08:29:49 -03:00
TargetInfo
llvmbuildectomy - replace llvm-build by plain cmake
2020-11-13 10:35:24 +01:00
Utils
[ARM][AArch64] Adding basic support for the v8.7-A architecture
2020-12-17 13:45:08 +00:00
AArch64.h
[AArch64] Homogeneous Prolog and Epilog Size Optimization
2021-02-02 14:57:26 -08:00
AArch64.td
[AArch64] Add Cortex CPU subtarget features for instruction fusion.
2021-01-25 09:11:29 +00:00
AArch64A53Fix835769.cpp
…
AArch64A57FPLoadBalancing.cpp
…
AArch64AdvSIMDScalarPass.cpp
[AArch64] Update a code comment incorrectly referring to zero_reg. NFC
2020-08-20 14:36:59 +02:00
AArch64AsmPrinter.cpp
[AArch64] Add support for the GNU ILP32 ABI
2021-01-20 13:34:47 +00:00
AArch64BranchTargets.cpp
[AArch64] PAC/BTI code generation for LLVM generated functions
2020-09-25 11:47:14 +01:00
AArch64CallingConvention.cpp
[SVE] Deal with SVE tuple call arguments correctly when running out of registers
2020-11-12 08:41:50 +00:00
AArch64CallingConvention.h
…
AArch64CallingConvention.td
[Alignment][NFC] Use Align for TargetCallingConv::OrigAlign
2020-06-25 13:21:22 +00:00
AArch64CleanupLocalDynamicTLSPass.cpp
…
AArch64CollectLOH.cpp
[AArch64] Fix CollectLOH creating an AdrpAdd LOH when there's a live used reg
2020-06-01 16:00:55 -07:00
AArch64Combine.td
[AArch64][GlobalISel] Add a combine to fold away truncate in: G_ICMP EQ/NE (G_TRUNC(v), 0)
2021-01-28 16:29:14 -08:00
AArch64CompressJumpTables.cpp
[AArch64] Don't try to compress jump tables if there are any inline asm instructions.
2020-12-10 12:20:02 -08:00
AArch64CondBrTuning.cpp
[AArch64CondBrTuning] Ignore debug insts when scanning for NZCV clobbers [10/14]
2020-04-22 17:03:40 -07:00
AArch64ConditionalCompares.cpp
DomTree: Remove getChildren() accessor
2020-07-06 21:58:11 +02:00
AArch64ConditionOptimizer.cpp
MachineBasicBlock::updateTerminator now requires an explicit layout successor.
2020-06-06 22:30:51 -04:00
AArch64DeadRegisterDefinitionsPass.cpp
…
AArch64ExpandImm.cpp
…
AArch64ExpandImm.h
…
AArch64ExpandPseudoInsts.cpp
Recommit "[AArch64] Lower calls with rv_marker attribute."
2020-12-13 16:20:39 +00:00
AArch64FalkorHWPFFix.cpp
Small fixes for "[LoopInfo] empty() -> isInnermost(), add isOutermost()"
2020-09-22 23:59:34 +03:00
AArch64FastISel.cpp
[FastISel] update to use intrinsic's isCommutative(); NFC
2020-08-30 11:36:41 -04:00
AArch64FrameLowering.cpp
[AArch64] Homogeneous Prolog and Epilog Size Optimization
2021-02-02 14:57:26 -08:00
AArch64FrameLowering.h
[AArch64] Homogeneous Prolog and Epilog Size Optimization
2021-02-02 14:57:26 -08:00
AArch64GenRegisterBankInfo.def
…
AArch64InstrAtomics.td
…
AArch64InstrFormats.td
[AArch64][SVE] Add optimization to remove redundant ptest instructions
2021-01-05 15:28:36 +00:00
AArch64InstrGISel.td
[AArch64][GlobalISel] Add selection support for fpr bank source variants of G_SITOFP and G_UITOFP.
2021-01-14 19:31:19 -08:00
AArch64InstrInfo.cpp
[NFC] Fix -Wsometimes-uninitialized
2021-01-13 20:32:38 -08:00
AArch64InstrInfo.h
[AArch64][SVE] Add optimization to remove redundant ptest instructions
2021-01-05 15:28:36 +00:00
AArch64InstrInfo.td
[AArch64] Homogeneous Prolog and Epilog Size Optimization
2021-02-02 14:57:26 -08:00
AArch64ISelDAGToDAG.cpp
[AArch64] Adding ACLE intrinsics for the LS64 extension
2021-01-14 09:43:58 +00:00
AArch64ISelLowering.cpp
[SVE][CodeGen] Remove performMaskedGatherScatterCombine
2021-02-01 14:10:00 +00:00
AArch64ISelLowering.h
[SVE][CodeGen] Remove performMaskedGatherScatterCombine
2021-02-01 14:10:00 +00:00
AArch64LoadStoreOptimizer.cpp
[AArch64] Don't merge sp decrement into later stores when using WinCFI
2020-10-01 19:03:27 +03:00
AArch64LowerHomogeneousPrologEpilog.cpp
[AArch64] Homogeneous Prolog and Epilog Size Optimization
2021-02-02 14:57:26 -08:00
AArch64MachineFunctionInfo.cpp
[AArch64] PAC/BTI code generation for LLVM generated functions
2020-09-25 11:47:14 +01:00
AArch64MachineFunctionInfo.h
[AArch64][SVE] Allow accesses to SVE stack objects to use frame pointer
2021-01-28 12:39:57 +00:00
AArch64MacroFusion.cpp
[AArch64] Add Cortex CPU subtarget features for instruction fusion.
2021-01-25 09:11:29 +00:00
AArch64MacroFusion.h
[llvm] Add missing header guards (NFC)
2021-01-30 09:53:42 -08:00
AArch64MCInstLower.cpp
[AArch64] [Windows] Properly add :lo12: reloc specifiers when generating assembly
2021-01-12 23:56:03 +02:00
AArch64MCInstLower.h
…
AArch64PBQPRegAlloc.cpp
…
AArch64PBQPRegAlloc.h
…
AArch64PerfectShuffle.h
…
AArch64PfmCounters.td
…
AArch64PromoteConstant.cpp
[AArch64] Don't promote constants with float ConstantExpr.
2020-05-13 23:31:47 +01:00
AArch64RedundantCopyElimination.cpp
[AArch64] Fix Copy Elemination for negative values
2020-12-18 13:30:46 +00:00
AArch64RegisterBanks.td
…
AArch64RegisterInfo.cpp
Change materializeFrameBaseRegister() to return register
2021-01-22 15:51:06 -08:00
AArch64RegisterInfo.h
Change materializeFrameBaseRegister() to return register
2021-01-22 15:51:06 -08:00
AArch64RegisterInfo.td
[AArch64] Add a GPR64x8 register class
2020-12-17 13:45:46 +00:00
AArch64SchedA53.td
[AARch64] Add Marvell ThunderX3T110 support
2020-05-13 16:58:51 -07:00
AArch64SchedA55.td
[AArch64] Enable Cortex-A55 schedmodel
2020-11-30 19:28:34 +00:00
AArch64SchedA57.td
[AARCH64] Improve accumulator forwarding for Cortex-A57 model
2021-01-04 10:58:43 +00:00
AArch64SchedA57WriteRes.td
[AARCH64] Improve accumulator forwarding for Cortex-A57 model
2021-01-04 10:58:43 +00:00
AArch64SchedA64FX.td
[AArch64] Add Fujitsu A64FX scheduling model
2021-01-15 17:14:04 +09:00
AArch64SchedCyclone.td
[AARch64] Add Marvell ThunderX3T110 support
2020-05-13 16:58:51 -07:00
AArch64SchedExynosM3.td
[AARch64] Add Marvell ThunderX3T110 support
2020-05-13 16:58:51 -07:00
AArch64SchedExynosM4.td
[AARch64] Add Marvell ThunderX3T110 support
2020-05-13 16:58:51 -07:00
AArch64SchedExynosM5.td
[AARch64] Add Marvell ThunderX3T110 support
2020-05-13 16:58:51 -07:00
AArch64SchedFalkor.td
[AARch64] Add Marvell ThunderX3T110 support
2020-05-13 16:58:51 -07:00
AArch64SchedFalkorDetails.td
…
AArch64SchedKryo.td
[AARch64] Add Marvell ThunderX3T110 support
2020-05-13 16:58:51 -07:00
AArch64SchedKryoDetails.td
…
AArch64SchedPredExynos.td
…
AArch64SchedPredicates.td
…
AArch64SchedThunderX2T99.td
[AARch64] Add Marvell ThunderX3T110 support
2020-05-13 16:58:51 -07:00
AArch64SchedThunderX3T110.td
[AARch64] Add Marvell ThunderX3T110 support
2020-05-13 16:58:51 -07:00
AArch64SchedThunderX.td
[AARch64] Add Marvell ThunderX3T110 support
2020-05-13 16:58:51 -07:00
AArch64SchedTSV110.td
[AArch64] Add pipeline model for HiSilicon's TSV110
2020-11-07 01:23:00 +03:00
AArch64Schedule.td
…
AArch64SelectionDAGInfo.cpp
[CodeGen] Refactor getMemBasePlusOffset & getObjectPtrOffset to accept a TypeSize
2020-08-11 12:17:10 +01:00
AArch64SelectionDAGInfo.h
[Alignment][NFC] Migrate SelectionDAGTargetInfo::EmitTargetCodeForMemset to Align
2020-06-30 12:46:26 +00:00
AArch64SIMDInstrOpt.cpp
[AArch64] reuse another map iterator. NFC
2020-09-28 11:30:21 -07:00
AArch64SLSHardening.cpp
[NFC] Clean up uses of MachineModuleInfoWrapperPass
2020-07-01 09:45:05 -07:00
AArch64SpeculationHardening.cpp
…
AArch64StackTagging.cpp
[llvm] Use llvm::lower_bound and llvm::upper_bound (NFC)
2021-01-05 21:15:59 -08:00
AArch64StackTaggingPreRA.cpp
[MTE] Pin the tagged base pointer to one of the stack slots.
2020-10-15 12:50:16 -07:00
AArch64StorePairSuppress.cpp
…
AArch64Subtarget.cpp
AArch64: add apple-a14 as a CPU
2021-01-19 14:04:53 +00:00
AArch64Subtarget.h
[AArch64] Add Cortex CPU subtarget features for instruction fusion.
2021-01-25 09:11:29 +00:00
AArch64SVEInstrInfo.td
[SVE] Restrict the usage of REINTERPRET_CAST.
2021-01-15 11:32:13 +00:00
AArch64SystemOperands.td
[AArch64] Add +pauth archictecture option, allowing the v8.3a pointer authentication extension.
2021-01-08 13:21:11 +00:00
AArch64TargetMachine.cpp
[AArch64] Homogeneous Prolog and Epilog Size Optimization
2021-02-02 14:57:26 -08:00
AArch64TargetMachine.h
Support addrspacecast initializers with isNoopAddrSpaceCast
2020-07-31 10:42:43 -04:00
AArch64TargetObjectFile.cpp
…
AArch64TargetObjectFile.h
[llvm][ELF][AArch64] Handle R_AARCH64_PLT32 relocation
2020-06-10 11:34:16 -07:00
AArch64TargetTransformInfo.cpp
[AArch64][SVE]Add cost model for broadcast shuffle
2021-02-03 09:53:22 +00:00
AArch64TargetTransformInfo.h
[SVE][LoopVectorize] Add masked load/store and gather/scatter support for SVE
2021-02-02 09:52:39 +00:00
CMakeLists.txt
[AArch64] Homogeneous Prolog and Epilog Size Optimization
2021-02-02 14:57:26 -08:00
SVEInstrFormats.td
[AArch64][SVE] Add lowering for llvm abs intrinsic
2021-01-08 08:55:25 +00:00
SVEIntrinsicOpts.cpp
[AArch64][SVE] Remove chains of unnecessary SVE reinterpret intrinsics
2021-01-13 09:44:09 +00:00