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llvm-mirror/test/CodeGen/PowerPC/fp64-to-int16.ll
Jinsong Ji c7cbe2ad6b [PowerPC] Support extended mnemonics mffprwz etc.
Summary:
Reported in https://github.com/opencv/opencv/issues/15413.

We have serveral extended mnemonics for Move To/From Vector-Scalar Register Instructions
eg: mffprd,mtfprd etc.

We only support one of them, this patch add the others.

Reviewers: nemanjai, steven.zhang, hfinkel, #powerpc

Reviewed By: hfinkel

Subscribers: wuzish, qcolombet, hiraditya, kbarton, MaskRay, shchenz, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D66963

llvm-svn: 370411
2019-08-29 21:53:59 +00:00

22 lines
590 B
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -O0 < %s | FileCheck %s
target triple = "powerpc64le--linux-gnu"
define i1 @Test(double %a) {
; CHECK-LABEL: Test:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xscvdpsxws 0, 1
; CHECK-NEXT: mffprwz 3, 0
; CHECK-NEXT: xori 3, 3, 65534
; CHECK-NEXT: cntlzw 3, 3
; CHECK-NEXT: srwi 3, 3, 5
; CHECK-NEXT: # implicit-def: $x4
; CHECK-NEXT: mr 4, 3
; CHECK-NEXT: mr 3, 4
; CHECK-NEXT: blr
entry:
%conv = fptoui double %a to i16
%cmp = icmp eq i16 %conv, -2
ret i1 %cmp
}