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llvm-mirror/test/CodeGen/Hexagon/newvaluejump.ll
Jakob Stoklund Olesen 43f9c539ae Infer instruction properties from single-instruction patterns.
Previously, instructions without a primary patterns wouldn't get their
properties inferred. Now, we use all single-instruction patterns for
inference, including 'def : Pat<>' instances.

This causes a lot of instruction flags to change.

- Many instructions no longer have the UnmodeledSideEffects flag because
  their flags are now inferred from a pattern.

- Instructions with intrinsics will get a mayStore flag if they already
  have UnmodeledSideEffects and a mayLoad flag if they already have
  mayStore. This is because intrinsics properties are linear.

- Instructions with atomic_load patterns get a mayStore flag because
  atomic loads can't be reordered. The correct workaround is to create
  pseudo-instructions instead of using normal loads. PR13693.

llvm-svn: 162614
2012-08-24 22:46:53 +00:00

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LLVM

; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
; XFAIL: *
; This is xfailed into we have atomic load pseudos. PR13693.
; Check that we generate new value jump.
@i = global i32 0, align 4
@j = global i32 10, align 4
define i32 @foo(i32 %a) nounwind {
entry:
; CHECK: if (cmp.eq(r{{[0-9]+}}.new, #0)) jump{{.}}
%addr1 = alloca i32, align 4
%addr2 = alloca i32, align 4
%0 = load i32* @i, align 4
store i32 %0, i32* %addr1, align 4
call void @bar(i32 1, i32 2)
%1 = load i32* @j, align 4
%tobool = icmp ne i32 %1, 0
br i1 %tobool, label %if.then, label %if.else
if.then:
call void @baz(i32 1, i32 2)
br label %if.end
if.else:
call void @guy(i32 10, i32 20)
br label %if.end
if.end:
ret i32 0
}
declare void @guy(i32, i32)
declare void @bar(i32, i32)
declare void @baz(i32, i32)