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f7935a3f63
`llc -march` is problematic because it only switches the target architecture, but leaves the operating system unchanged. This occasionally leads to indeterministic tests because the OS from LLVM_DEFAULT_TARGET_TRIPLE is used. However we can simply always use `llc -mtriple` instead. This changes all the tests to do this to avoid people using -march when they copy and paste parts of tests. See also the discussion in https://reviews.llvm.org/D35287 llvm-svn: 309774
150 lines
3.7 KiB
LLVM
150 lines
3.7 KiB
LLVM
; RUN: llc < %s -mtriple=i686--
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; RUN: llc < %s -mtriple=x86_64--
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;
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; Scalars
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;
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define void @test_lshr_i128(i128 %x, i128 %a, i128* nocapture %r) nounwind {
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entry:
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%0 = lshr i128 %x, %a
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store i128 %0, i128* %r, align 16
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ret void
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}
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define void @test_ashr_i128(i128 %x, i128 %a, i128* nocapture %r) nounwind {
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entry:
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%0 = ashr i128 %x, %a
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store i128 %0, i128* %r, align 16
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ret void
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}
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define void @test_shl_i128(i128 %x, i128 %a, i128* nocapture %r) nounwind {
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entry:
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%0 = shl i128 %x, %a
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store i128 %0, i128* %r, align 16
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ret void
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}
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define void @test_lshr_i128_outofrange(i128 %x, i128* nocapture %r) nounwind {
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entry:
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%0 = lshr i128 %x, -1
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store i128 %0, i128* %r, align 16
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ret void
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}
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define void @test_ashr_i128_outofrange(i128 %x, i128* nocapture %r) nounwind {
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entry:
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%0 = ashr i128 %x, -1
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store i128 %0, i128* %r, align 16
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ret void
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}
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define void @test_shl_i128_outofrange(i128 %x, i128* nocapture %r) nounwind {
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entry:
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%0 = shl i128 %x, -1
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store i128 %0, i128* %r, align 16
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ret void
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}
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;
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; Vectors
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;
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define void @test_lshr_v2i128(<2 x i128> %x, <2 x i128> %a, <2 x i128>* nocapture %r) nounwind {
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entry:
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%0 = lshr <2 x i128> %x, %a
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store <2 x i128> %0, <2 x i128>* %r, align 16
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ret void
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}
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define void @test_ashr_v2i128(<2 x i128> %x, <2 x i128> %a, <2 x i128>* nocapture %r) nounwind {
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entry:
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%0 = ashr <2 x i128> %x, %a
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store <2 x i128> %0, <2 x i128>* %r, align 16
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ret void
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}
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define void @test_shl_v2i128(<2 x i128> %x, <2 x i128> %a, <2 x i128>* nocapture %r) nounwind {
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entry:
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%0 = shl <2 x i128> %x, %a
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store <2 x i128> %0, <2 x i128>* %r, align 16
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ret void
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}
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define void @test_lshr_v2i128_outofrange(<2 x i128> %x, <2 x i128>* nocapture %r) nounwind {
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entry:
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%0 = lshr <2 x i128> %x, <i128 -1, i128 -1>
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store <2 x i128> %0, <2 x i128>* %r, align 16
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ret void
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}
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define void @test_ashr_v2i128_outofrange(<2 x i128> %x, <2 x i128>* nocapture %r) nounwind {
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entry:
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%0 = ashr <2 x i128> %x, <i128 -1, i128 -1>
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store <2 x i128> %0, <2 x i128>* %r, align 16
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ret void
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}
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define void @test_shl_v2i128_outofrange(<2 x i128> %x, <2 x i128>* nocapture %r) nounwind {
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entry:
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%0 = shl <2 x i128> %x, <i128 -1, i128 -1>
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store <2 x i128> %0, <2 x i128>* %r, align 16
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ret void
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}
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define void @test_lshr_v2i128_outofrange_sum(<2 x i128> %x, <2 x i128>* nocapture %r) nounwind {
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entry:
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%0 = lshr <2 x i128> %x, <i128 -1, i128 -1>
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%1 = lshr <2 x i128> %0, <i128 1, i128 1>
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store <2 x i128> %1, <2 x i128>* %r, align 16
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ret void
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}
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define void @test_ashr_v2i128_outofrange_sum(<2 x i128> %x, <2 x i128>* nocapture %r) nounwind {
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entry:
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%0 = ashr <2 x i128> %x, <i128 -1, i128 -1>
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%1 = ashr <2 x i128> %0, <i128 1, i128 1>
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store <2 x i128> %1, <2 x i128>* %r, align 16
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ret void
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}
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define void @test_shl_v2i128_outofrange_sum(<2 x i128> %x, <2 x i128>* nocapture %r) nounwind {
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entry:
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%0 = shl <2 x i128> %x, <i128 -1, i128 -1>
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%1 = shl <2 x i128> %0, <i128 1, i128 1>
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store <2 x i128> %1, <2 x i128>* %r, align 16
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ret void
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}
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;
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; Combines
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;
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define <2 x i256> @shl_sext_shl_outofrange(<2 x i128> %a0) {
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%1 = shl <2 x i128> %a0, <i128 -1, i128 -1>
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%2 = sext <2 x i128> %1 to <2 x i256>
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%3 = shl <2 x i256> %2, <i256 128, i256 128>
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ret <2 x i256> %3
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}
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define <2 x i256> @shl_zext_shl_outofrange(<2 x i128> %a0) {
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%1 = shl <2 x i128> %a0, <i128 -1, i128 -1>
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%2 = zext <2 x i128> %1 to <2 x i256>
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%3 = shl <2 x i256> %2, <i256 128, i256 128>
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ret <2 x i256> %3
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}
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define <2 x i256> @shl_zext_lshr_outofrange(<2 x i128> %a0) {
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%1 = lshr <2 x i128> %a0, <i128 -1, i128 -1>
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%2 = zext <2 x i128> %1 to <2 x i256>
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%3 = shl <2 x i256> %2, <i256 128, i256 128>
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ret <2 x i256> %3
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}
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define i128 @lshr_shl_mask(i128 %a0) {
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%1 = shl i128 %a0, 1
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%2 = lshr i128 %1, 1
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ret i128 %2
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}
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