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llvm-mirror/lib/MCA
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Andrea Di Biagio 9789db4ce7 [MCA][RegisterFile] Refactor the move elimination logic to address PR50258. 
This patch lifts the restriction on the number of read/write registers for a
move elimination candidate.  With this patch, move elimination candidates with
exactly two reads and two writes are treated like register swap operations for
the purpose of move elimination.

This patch currently doesn't affect any upstream model. However, it should help
unblock the progress on PR50258.
2021-05-08 18:10:35 +01:00
..
HardwareUnits [MCA][RegisterFile] Refactor the move elimination logic to address PR50258. 2021-05-08 18:10:35 +01:00
Stages [MCA][RegisterFile] Refactor the move elimination logic to address PR50258. 2021-05-08 18:10:35 +01:00
CMakeLists.txt [MCA] Add support for in-order CPUs 2021-03-04 14:08:19 +03:00
CodeEmitter.cpp
Context.cpp [MCA] Disable RCU for InOrderIssueStage 2021-03-24 13:54:04 +03:00
HWEventListener.cpp
InstrBuilder.cpp [MCA] Add support for in-order CPUs 2021-03-04 14:08:19 +03:00
Instruction.cpp [MCA] Improved handling of negative read-advance cycles. 2021-03-23 14:47:23 +00:00
Pipeline.cpp
Support.cpp