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064cc1a22c
This patch adds a pipeline to support in-order CPUs such as ARM Cortex-A55. In-order pipeline implements a simplified version of Dispatch, Scheduler and Execute stages as a single stage. Entry and Retire stages are common for both in-order and out-of-order pipelines. Differential Revision: https://reviews.llvm.org/D94928
31 lines
666 B
CMake
31 lines
666 B
CMake
add_llvm_component_library(LLVMMCA
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CodeEmitter.cpp
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Context.cpp
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HWEventListener.cpp
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HardwareUnits/HardwareUnit.cpp
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HardwareUnits/LSUnit.cpp
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HardwareUnits/RegisterFile.cpp
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HardwareUnits/ResourceManager.cpp
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HardwareUnits/RetireControlUnit.cpp
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HardwareUnits/Scheduler.cpp
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InstrBuilder.cpp
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Instruction.cpp
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Pipeline.cpp
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Stages/DispatchStage.cpp
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Stages/EntryStage.cpp
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Stages/ExecuteStage.cpp
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Stages/InOrderIssueStage.cpp
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Stages/InstructionTables.cpp
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Stages/MicroOpQueueStage.cpp
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Stages/RetireStage.cpp
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Stages/Stage.cpp
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Support.cpp
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ADDITIONAL_HEADER_DIRS
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${LLVM_MAIN_INCLUDE_DIR}/llvm/MCA
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LINK_COMPONENTS
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MC
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Support
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)
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