Thomas Lively 3cb6cbd893 [WebAssembly] Saturating arithmetic intrinsics ... Summary: Depends on D52805. Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52813 llvm-svn: 343833		2018-10-05 00:45:20 +00:00
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AArch64	[AArch64][v8.5A] Add Memory Tagging instructions	2018-10-02 10:04:39 +00:00
AMDGPU	AMDGPU: Print all kernel descriptor directives (including the ones with default values)	2018-09-12 20:25:39 +00:00
ARM	[ARM] Emmit data symbol for constant pool data	2018-10-02 14:55:48 +00:00
AsmParser	[debuginfo] generate debug info with asm+.file	2018-08-28 16:23:39 +00:00
AVR	[AVR] Redefine the 'SBR' instruction as an alias	2018-09-01 12:22:54 +00:00
BPF
COFF	[COFF] [X86] Don't use llvm_unreachable for unsupported relocation types	2018-10-04 20:43:38 +00:00
Disassembler	[X86][Disassembler] Add bizarro versions of the MOVSXD instruction that sign extend from a GR32 to GR32 or GR16.	2018-10-02 18:16:19 +00:00
ELF	[lib/MC] - Set SHF_EXCLUDE flag for .dwo sections.	2018-09-22 07:36:20 +00:00
Hexagon	Check for tied operands	2018-08-13 14:01:25 +00:00
Lanai
MachO	[MC/Dwarf] Unclamp DWARF linetables format on Darwin.	2018-09-13 13:13:50 +00:00
Mips	[mips] Fix MIPS N32 ABI triples support	2018-09-17 21:21:57 +00:00
PowerPC	[MC] Avoid inlining constant symbols with variants.	2018-09-17 20:34:26 +00:00
RISCV	[RISCV] Support named operands for CSR instructions.	2018-10-04 21:50:54 +00:00
Sparc	[Sparc] Add unimp alias	2018-09-27 12:34:53 +00:00
SystemZ
WebAssembly	[WebAssembly] Saturating arithmetic intrinsics	2018-10-05 00:45:20 +00:00
X86	[X86][Assembler] Allow %eip as a register in 32-bit mode for .cfi directives.	2018-09-06 02:03:14 +00:00