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llvm-mirror/test/CodeGen/X86/sse42.ll
Kevin Enderby 766909ae3b Fixed the encoding problems of the crc32 instructions. All had the Operand size
override prefix and only the r/m16 forms should have had that.  Also for variant
one, the AT&T syntax, added suffixes to all forms.  Also added the missing
64-bit form for 'CRC32 r64, r/m8'.  Plus added test cases for all forms and
tweaked one test case to add the needed suffixes.

llvm-svn: 98980
2010-03-19 20:04:42 +00:00

39 lines
1.0 KiB
LLVM

; RUN: llc < %s -mtriple=i686-apple-darwin9 -mattr=sse42 | FileCheck %s -check-prefix=X32
; RUN: llc < %s -mtriple=x86_64-apple-darwin9 -mattr=sse42 | FileCheck %s -check-prefix=X64
declare i32 @llvm.x86.sse42.crc32.8(i32, i8) nounwind
declare i32 @llvm.x86.sse42.crc32.16(i32, i16) nounwind
declare i32 @llvm.x86.sse42.crc32.32(i32, i32) nounwind
define i32 @crc32_8(i32 %a, i8 %b) nounwind {
%tmp = call i32 @llvm.x86.sse42.crc32.8(i32 %a, i8 %b)
ret i32 %tmp
; X32: _crc32_8:
; X32: crc32b 8(%esp), %eax
; X64: _crc32_8:
; X64: crc32b %sil, %eax
}
define i32 @crc32_16(i32 %a, i16 %b) nounwind {
%tmp = call i32 @llvm.x86.sse42.crc32.16(i32 %a, i16 %b)
ret i32 %tmp
; X32: _crc32_16:
; X32: crc32w 8(%esp), %eax
; X64: _crc32_16:
; X64: crc32w %si, %eax
}
define i32 @crc32_32(i32 %a, i32 %b) nounwind {
%tmp = call i32 @llvm.x86.sse42.crc32.32(i32 %a, i32 %b)
ret i32 %tmp
; X32: _crc32_32:
; X32: crc32l 8(%esp), %eax
; X64: _crc32_32:
; X64: crc32l %esi, %eax
}