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llvm-mirror/lib/Target/AArch64
Kerry McLaughlin 1b630dbb38 [AArch64][SVE] Add SVE intrinsics for masked loads & stores
Summary:
Implements the following intrinsics for contiguous loads & stores:
  - @llvm.aarch64.sve.ld1
  - @llvm.aarch64.sve.st1

Reviewers: sdesmalen, andwar, efriedma, cameron.mcinally, dancgr, rengolin

Reviewed By: cameron.mcinally

Subscribers: tschuett, kristof.beyls, hiraditya, rkruppe, psnobl, danielkiss, cfe-commits, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D76688
2020-03-25 11:48:40 +00:00
..
AsmParser [AArch64][ASMParser] Refuse equal source/destination for LDRAA/LDRAB 2020-02-19 14:15:17 +00:00
Disassembler CMake: Make most target symbols hidden by default 2020-01-14 19:46:52 -08:00
MCTargetDesc Fix unused function warning 2020-03-16 19:45:36 -07:00
TargetInfo CMake: Make most target symbols hidden by default 2020-01-14 19:46:52 -08:00
Utils [AArch64][SVE] Add patterns for unpredicated load/store to frame-indices. 2020-01-22 14:32:27 +00:00
AArch64.h
AArch64.td [AArch64] Add support for Fujitsu A64FX 2020-03-09 19:15:09 +09:00
AArch64A53Fix835769.cpp
AArch64A57FPLoadBalancing.cpp
AArch64AdvSIMDScalarPass.cpp
AArch64AsmPrinter.cpp [MC] Add MCStreamer::emitInt{8,16,32,64} 2020-02-29 09:40:21 -08:00
AArch64BranchTargets.cpp [AArch64] Fix BTI landing pad generation. 2020-02-13 10:44:34 +00:00
AArch64CallingConvention.cpp
AArch64CallingConvention.h
AArch64CallingConvention.td [AArch64][SVE] Remove nxv1f32 and nxv1f64 as legal types 2019-12-12 09:49:22 +00:00
AArch64CallLowering.cpp GlobalISel: Set alignment on function argument stack load/store 2020-03-04 16:38:46 -05:00
AArch64CallLowering.h
AArch64CleanupLocalDynamicTLSPass.cpp [CallSiteInfo] Handle bundles when updating call site info 2020-02-27 13:57:06 +01:00
AArch64CollectLOH.cpp
AArch64Combine.td [AArch64][GlobalISel] Change G_FCONSTANTs feeding into stores into G_CONSTANTS 2020-01-16 15:18:44 -08:00
AArch64CompressJumpTables.cpp [Alignment][NFC] Deprecate Align::None() 2020-01-24 12:53:58 +01:00
AArch64CondBrTuning.cpp
AArch64ConditionalCompares.cpp Update spelling of {analyze,insert,remove}Branch in strings and comments 2020-01-21 10:15:38 -06:00
AArch64ConditionOptimizer.cpp Update spelling of {analyze,insert,remove}Branch in strings and comments 2020-01-21 10:15:38 -06:00
AArch64DeadRegisterDefinitionsPass.cpp
AArch64ExpandImm.cpp
AArch64ExpandImm.h
AArch64ExpandPseudoInsts.cpp [AArch64][SVE] Add support for DestructiveBinaryImm DestructiveInstType 2020-03-19 13:11:46 -05:00
AArch64FalkorHWPFFix.cpp [TargetRegisterInfo] Default trackLivenessAfterRegAlloc() to true 2020-01-19 14:20:37 -08:00
AArch64FastISel.cpp [AArch64] [Windows] Use COFF stubs for calls to extern_weak functions 2019-12-23 12:13:49 +02:00
AArch64FrameLowering.cpp [Alignment][NFC] Deprecate getMaxAlignment 2020-03-18 14:48:45 +01:00
AArch64FrameLowering.h ArrayRef'ize restoreCalleeSavedRegisters. NFCI. 2020-02-29 09:50:23 +01:00
AArch64GenRegisterBankInfo.def
AArch64InstrAtomics.td DAG: Use TargetConstant for FENCE operands 2020-01-02 17:16:10 -05:00
AArch64InstrFormats.td [AArch64][SVE] Add support for DestructiveBinary and DestructiveBinaryComm DestructiveInstTypes 2020-02-21 15:19:54 -06:00
AArch64InstrInfo.cpp [AArch64][MachineOutliner] Don't outline CFI instructions 2020-03-02 10:56:35 -08:00
AArch64InstrInfo.h [AArch64][SVE] Add support for DestructiveBinary and DestructiveBinaryComm DestructiveInstTypes 2020-02-21 15:19:54 -06:00
AArch64InstrInfo.td [TableGen] Support combining AssemblerPredicates with ORs 2020-03-13 17:13:51 +00:00
AArch64InstructionSelector.cpp [AArch64][GlobalISel] Avoid copies to target register bank for subregister copies 2020-03-05 11:13:02 -08:00
AArch64ISelDAGToDAG.cpp [llvm][SVE] Addressing mode for FF/NF loads. 2020-03-18 12:46:07 +00:00
AArch64ISelLowering.cpp [AArch64][SVE] Add SVE intrinsics for masked loads & stores 2020-03-25 11:48:40 +00:00
AArch64ISelLowering.h [AArch64][GlobalISel] Don't localize TLS G_GLOBAL_VALUEs on Darwin. 2020-03-24 13:35:50 -07:00
AArch64LegalizerInfo.cpp [GlobalISel] Tidy up unnecessary calls to createGenericVirtualRegister 2020-01-31 17:07:16 +00:00
AArch64LegalizerInfo.h GlobalISel: Add observer argument to legalizeIntrinsic 2020-01-29 18:33:45 -05:00
AArch64LoadStoreOptimizer.cpp [AArch64][Fix] LdSt optimization generate premature stack-popping 2020-03-14 02:03:10 +00:00
AArch64MachineFunctionInfo.h Revert "AArch64: Fix frame record chain" 2019-12-14 13:58:40 -08:00
AArch64MacroFusion.cpp
AArch64MacroFusion.h
AArch64MCInstLower.cpp
AArch64MCInstLower.h
AArch64PBQPRegAlloc.cpp
AArch64PBQPRegAlloc.h
AArch64PerfectShuffle.h
AArch64PfmCounters.td
AArch64PreLegalizerCombiner.cpp [AArch64][GlobalISel] Change G_FCONSTANTs feeding into stores into G_CONSTANTS 2020-01-16 15:18:44 -08:00
AArch64PromoteConstant.cpp
AArch64RedundantCopyElimination.cpp
AArch64RegisterBankInfo.cpp Reland "[AArch64] Fix data race on RegisterBank initialization." 2020-02-07 13:13:55 -08:00
AArch64RegisterBankInfo.h GlobalISel: Add type argument to getRegBankFromRegClass 2020-01-03 16:25:10 -05:00
AArch64RegisterBanks.td
AArch64RegisterInfo.cpp [AArch64] Add IR intrinsics for sq(r)dmulh_lane(q) 2020-01-29 13:25:23 +00:00
AArch64RegisterInfo.h [TargetRegisterInfo] Default trackLivenessAfterRegAlloc() to true 2020-01-19 14:20:37 -08:00
AArch64RegisterInfo.td [AArch64] Add IR intrinsics for sq(r)dmulh_lane(q) 2020-01-29 13:25:23 +00:00
AArch64SchedA53.td
AArch64SchedA57.td [AArch64] Add BIT/BIF support. 2020-02-14 14:19:39 +00:00
AArch64SchedA57WriteRes.td
AArch64SchedCyclone.td [AArch64] Add BIT/BIF support. 2020-02-14 14:19:39 +00:00
AArch64SchedExynosM3.td [AArch64] Add BIT/BIF support. 2020-02-14 14:19:39 +00:00
AArch64SchedExynosM4.td [AArch64] Add BIT/BIF support. 2020-02-14 14:19:39 +00:00
AArch64SchedExynosM5.td [AArch64] Add BIT/BIF support. 2020-02-14 14:19:39 +00:00
AArch64SchedFalkor.td
AArch64SchedFalkorDetails.td [AArch64] Add BIT/BIF support. 2020-02-14 14:19:39 +00:00
AArch64SchedKryo.td
AArch64SchedKryoDetails.td [AArch64] Add BIT/BIF support. 2020-02-14 14:19:39 +00:00
AArch64SchedPredExynos.td
AArch64SchedPredicates.td
AArch64SchedThunderX2T99.td [AArch64] Add BIT/BIF support. 2020-02-14 14:19:39 +00:00
AArch64SchedThunderX.td
AArch64Schedule.td
AArch64SelectionDAGInfo.cpp Merge memtag instructions with adjacent stack slots. 2020-01-17 15:19:29 -08:00
AArch64SelectionDAGInfo.h
AArch64SIMDInstrOpt.cpp Make llvm::StringRef to std::string conversions explicit. 2020-01-28 23:25:25 +01:00
AArch64SpeculationHardening.cpp
AArch64StackOffset.h Explicitly include <cassert> when using assert 2020-03-02 22:45:28 +01:00
AArch64StackTagging.cpp [memtag] Plug in stack safety analysis. 2020-03-16 16:35:25 -07:00
AArch64StackTaggingPreRA.cpp
AArch64StorePairSuppress.cpp Add OffsetIsScalable to getMemOperandWithOffset 2020-02-18 15:53:29 +00:00
AArch64Subtarget.cpp [AArch64] Add support for Fujitsu A64FX 2020-03-09 19:15:09 +09:00
AArch64Subtarget.h [AArch64] Add support for Fujitsu A64FX 2020-03-09 19:15:09 +09:00
AArch64SVEInstrInfo.td [AArch64][SVE] Add support for DestructiveBinaryImm DestructiveInstType 2020-03-19 13:11:46 -05:00
AArch64SystemOperands.td [TableGen] Support combining AssemblerPredicates with ORs 2020-03-13 17:13:51 +00:00
AArch64TargetMachine.cpp Reland D73534: [DebugInfo] Enable the debug entry values feature by default 2020-03-19 13:57:30 +01:00
AArch64TargetMachine.h
AArch64TargetObjectFile.cpp [X86] Reland D71360 Clean up UseInitArray initialization for X86ELFTargetObjectFile 2020-03-20 21:57:34 -07:00
AArch64TargetObjectFile.h
AArch64TargetTransformInfo.cpp [IR] Split out target specific intrinsic enums into separate headers 2019-12-11 18:02:14 -08:00
AArch64TargetTransformInfo.h [AArch64][ARM] Always expand ordered vector reductions (PR44600) 2020-01-30 18:40:24 +01:00
CMakeLists.txt
LLVMBuild.txt
SVEInstrFormats.td [AArch64][SVE] Add support for DestructiveBinaryImm DestructiveInstType 2020-03-19 13:11:46 -05:00