Hal Finkel 47533e9dd7 [PowerPC] Fix PPCLoopPreIncPrep for depth > 1 loops ... This pass had the same problem as the data-prefetching pass: it was only checking for depth == 1 loops in practice. Fix that, add some debugging statements, and make sure that, when we grab an AddRec, it is for the loop we expect. llvm-svn: 234670		2015-04-11 00:33:08 +00:00
..
AArch64	[CodeGen] Split -enable-global-merge into ARM and AArch64 options.	2015-04-11 00:06:36 +00:00
ARM	[CodeGen] Split -enable-global-merge into ARM and AArch64 options.	2015-04-11 00:06:36 +00:00
BPF	[bpf] mark mov instructions as ReMaterializable	2015-03-31 02:49:58 +00:00
CPP
Generic	LLParser: Require non-null scope for MDLocation and MDLocalVariable	2015-03-27 17:56:39 +00:00
Hexagon	Expand MUX instructions early on Hexagon	2015-03-31 13:35:12 +00:00
Inputs	DebugInfo: Fix bad debug info for compile units and types	2015-03-27 20:46:33 +00:00
Mips	Use sext in fast isel.	2015-04-06 22:29:07 +00:00
MSP430	[opaque pointer type] Add textual IR support for explicit type parameter to gep operator	2015-03-13 18:20:45 +00:00
NVPTX	[NVPTX] Associate a minimum PTX version for each SM architecture	2015-03-30 19:30:55 +00:00
PowerPC	[PowerPC] Fix PPCLoopPreIncPrep for depth > 1 loops	2015-04-11 00:33:08 +00:00
R600	R600/SI: Don't print offset0/offset1 DS operands when they are 0	2015-04-08 01:09:19 +00:00
SPARC	[opaque pointer type] Add textual IR support for explicit type parameter to gep operator	2015-03-13 18:20:45 +00:00
SystemZ	[SystemZ] Support transactional execution on zEC12	2015-04-01 12:51:43 +00:00
Thumb	DebugInfo: Fix bad debug info for compile units and types	2015-03-27 20:46:33 +00:00
Thumb2	[ARM] support for Cortex-R4/R4F	2015-04-09 14:07:28 +00:00
WinEH	[WinEH] Recognize SEH finally block inserted by the frontend	2015-04-10 23:12:29 +00:00
X86	[InstCombine][CodeGenPrep] Create llvm.uadd.with.overflow in CGP.	2015-04-10 21:07:09 +00:00
XCore	DebugInfo: Fix testcases that fail -verify-debug-info=true	2015-03-16 21:10:12 +00:00