llvm-mirror/x86-64-tls-1.ll at 47533e9dd74bc59a47064c73f163ffc2f78de0e4 - llvm-mirror - Git.je (Gitea)

RPCS3/llvm-mirror

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Craig Topper 54ac1d95cd [X86] Don't use GR64 register 'and with immediate' instructions if the immediate is zero in the upper 33-bits or upper 57-bits. Use GR32 instructions instead.

Previously the patterns didn't have high enough priority and we would only use the GR32 form if the only the upper 32 or 56 bits were zero.

Fixes PR23100.

llvm-svn: 234075

2015-04-04 02:08:20 +00:00

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 ; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
 @tm_nest_level = internal thread_local global i32 0
 define i64 @z() nounwind {
 ; CHECK:      movq    $tm_nest_level@TPOFF, %r[[R0:[abcd]]]x
 ; CHECK-NEXT: addl    %fs:0, %e[[R0]]x
 ; CHECK-NEXT: andl    $100, %e[[R0]]x
   ret i64 and (i64 ptrtoint (i32* @tm_nest_level to i64), i64 100)
 }