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0eb872067d
This re-applies r268760, reverted in r268794. Fixes http://llvm.org/PR27670 The original imp-defs assertion was way overzealous: forward all implicit operands, except imp-defs of the new super-reg def (r268787 for GR64, but also possible for GR16->GR32), or imp-uses of the new super-reg use. While there, mark the source use as Undef, and add an imp-use of the old source reg: that should cover any case of dead super-regs. At the stage the pass runs, flags are unlikely to matter anyway; still, let's be as correct as possible. Also add MIR tests for the various interesting cases. Original commit message: Codesize is less (16) or equal (8), and we avoid partial dependencies. Differential Revision: http://reviews.llvm.org/D19999 llvm-svn: 268831
26 lines
863 B
LLVM
26 lines
863 B
LLVM
; RUN: llc < %s -march=x86 | FileCheck %s
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; This test should get one and only one register to register mov.
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; CHECK-LABEL: t:
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; CHECK: movl
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; CHECK-NOT: mov
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; CHECK: ret
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define signext i16 @t() {
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entry:
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%tmp180 = load i16, i16* null, align 2 ; <i16> [#uses=3]
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%tmp180181 = sext i16 %tmp180 to i32 ; <i32> [#uses=1]
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%tmp182 = add i16 %tmp180, 10
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%tmp185 = icmp slt i16 %tmp182, 0 ; <i1> [#uses=1]
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br i1 %tmp185, label %cond_true188, label %cond_next245
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cond_true188: ; preds = %entry
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%tmp195196 = trunc i16 %tmp180 to i8 ; <i8> [#uses=0]
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ret i16 %tmp180
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cond_next245: ; preds = %entry
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%tmp256 = and i32 %tmp180181, 15 ; <i32> [#uses=0]
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%tmp3 = trunc i32 %tmp256 to i16
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ret i16 %tmp3
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}
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