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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-19 19:12:56 +02:00
llvm-mirror/test/CodeGen
Craig Topper aba789b2f0 [X86] Add test cases that exercise the BSR/BSF optimization combineCMov.
combineCmov tries to remove compares against BSR/BSF if we can prove the input to the BSR/BSF are never zero.

As far as I can tell most of the time codegenprepare despeculates ctlz/cttz and gives us a cttz_zero_undef/ctlz_zero_undef which don't use a cmov.

So the only way I found to trigger this code is to show codegenprepare an illegal type which it won't despeculate.

I think we should be turning ctlz/cttz into ctlz_zero_undef/cttz_zero_undef for these cases before we ever get to operation legalization where the cmov is created. But wanted to add these tests so we don't regress.

llvm-svn: 324409
2018-02-06 21:47:04 +00:00
..
AArch64 [AArch64] add test to show sub-optimal isel; NFC 2018-02-06 21:25:02 +00:00
AMDGPU AMDGPU: Fix S_BUFFER_LOAD_DWORD_SGPR moveToVALU 2018-02-06 15:17:55 +00:00
ARC
ARM [ARM] f16 conversions 2018-02-06 16:28:43 +00:00
AVR
BPF [DWARF] Regularize dumping strings from line tables. 2018-02-05 20:43:15 +00:00
Generic Revert "[MergeICmps] Enable the MergeICmps Pass by default." 2018-02-06 08:40:18 +00:00
Hexagon [Hexagon] Lower concat of more than 2 vectors into build_vector 2018-02-06 20:18:58 +00:00
Inputs
Lanai Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
Mips [MIPS] Regenerate vector tests with update script 2018-02-03 22:11:22 +00:00
MIR Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
MSP430
Nios2
NVPTX
PowerPC Revert "[MergeICmps] Enable the MergeICmps Pass by default." 2018-02-06 08:40:18 +00:00
RISCV [RISCV] Update two RISCV codegen tests after rL323991 2018-02-03 13:02:30 +00:00
SPARC [MachineCopyPropagation] Extend pass to do COPY source forwarding 2018-02-01 18:54:01 +00:00
SystemZ [SelectionDAG] Consider endianness in scalarizeVectorStore(). 2018-02-02 08:48:02 +00:00
Thumb [MachineCopyPropagation] Extend pass to do COPY source forwarding 2018-02-01 18:54:01 +00:00
Thumb2 Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
WebAssembly [WebAssembly] Fix test expectations after r324274 2018-02-06 01:21:17 +00:00
WinCFGuard
WinEH
X86 [X86] Add test cases that exercise the BSR/BSF optimization combineCMov. 2018-02-06 21:47:04 +00:00
XCore