Krzysztof Parzyszek a28e3dd9fd [RDF] Add initial support for lane masks in the DFG ... Use lane masks for calculating covering and aliasing of register references. llvm-svn: 282194		2016-09-22 21:01:24 +00:00
..
AsmParser	Defer asm errors to post-statement failure	2016-09-16 18:30:20 +00:00
Disassembler	[Hexagon] Fix disassembler crash after r279255	2016-09-09 21:45:00 +00:00
MCTargetDesc	[Hexagon] Make p0 an explicit operand in VA1_clr* subinstructions, NFC	2016-08-19 15:17:19 +00:00
TargetInfo
BitTracker.cpp	[Hexagon] Clear the flow queue after visiting a single instruction	2016-09-13 14:36:55 +00:00
BitTracker.h	[Hexagon-ish] Add function to print cell map contents in bit tracker	2016-08-03 18:13:32 +00:00
CMakeLists.txt	[Hexagon] Delete HexagonSelectCCInfo.td	2016-08-10 16:23:53 +00:00
Hexagon.h
Hexagon.td	[Hexagon] Add target feature to generate long calls	2016-07-25 14:42:11 +00:00
HexagonAsmPrinter.cpp	[Hexagon] Fix indentation, NFC	2016-08-19 14:12:51 +00:00
HexagonAsmPrinter.h
HexagonBitSimplify.cpp	[Hexagon] Standardize next batch of pseudo instructions	2016-08-16 18:08:40 +00:00
HexagonBitTracker.cpp	[Hexagon] Handle J2_jumptpt and J2_jumpfpt instructions	2016-08-19 14:14:09 +00:00
HexagonBitTracker.h
HexagonBlockRanges.cpp	Use the range variant of find/find_if instead of unpacking begin/end	2016-08-12 03:55:06 +00:00
HexagonBlockRanges.h
HexagonBranchRelaxation.cpp	[Hexagon] Referencify MachineInstr in HexagonInstrInfo, NFC	2016-07-29 21:49:42 +00:00
HexagonCallingConv.td
HexagonCFGOptimizer.cpp	MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it	2016-08-25 01:27:13 +00:00
HexagonCommonGEP.cpp	CodeGen: Remove MachineFunctionAnalysis => Enable (Machine)ModulePasses	2016-08-24 01:52:46 +00:00
HexagonConstPropagation.cpp	[Hexagon] Standardize next batch of pseudo instructions	2016-08-16 18:08:40 +00:00
HexagonCopyToCombine.cpp	[Hexagon] Remove extraneous debug output from HexagonCopyToCombine.cpp	2016-08-25 16:46:09 +00:00
HexagonEarlyIfConv.cpp	Finish renaming remaining analyzeBranch functions	2016-09-14 20:43:16 +00:00
HexagonExpandCondsets.cpp	[Hexagon] Deal with undefs when extending live intervals	2016-09-01 13:59:35 +00:00
HexagonFixupHwLoops.cpp	MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it	2016-08-25 01:27:13 +00:00
HexagonFrameLowering.cpp	MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it	2016-08-25 01:27:13 +00:00
HexagonFrameLowering.h	[Hexagon] Check for offset overflow when reserving scavenging slots	2016-08-01 17:15:30 +00:00
HexagonGenExtract.cpp	CodeGen: Remove MachineFunctionAnalysis => Enable (Machine)ModulePasses	2016-08-24 01:52:46 +00:00
HexagonGenInsert.cpp	Use the range variant of remove_if instead of unpacking begin/end	2016-08-12 04:32:37 +00:00
HexagonGenMux.cpp	MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it	2016-08-25 01:27:13 +00:00
HexagonGenPredicate.cpp
HexagonHardwareLoops.cpp	Make analyzeBranch family of instruction names consistent	2016-09-14 17:24:15 +00:00
HexagonHazardRecognizer.cpp	[Hexagon] Referencify MachineInstr in HexagonInstrInfo, NFC	2016-07-29 21:49:42 +00:00
HexagonHazardRecognizer.h	Fix license information in the file header	2016-07-29 14:04:17 +00:00
HexagonInstrAlias.td	[Hexagon] Clean up some miscellaneous V60 intrinsics a bit	2016-08-16 17:14:44 +00:00
HexagonInstrEnc.td
HexagonInstrFormats.td	[Hexagon] Update instruction itineraries	2016-07-15 16:58:34 +00:00
HexagonInstrFormatsV4.td	[Hexagon] Update instruction itineraries	2016-07-15 16:58:34 +00:00
HexagonInstrFormatsV60.td
HexagonInstrInfo.cpp	Finish renaming remaining analyzeBranch functions	2016-09-14 20:43:16 +00:00
HexagonInstrInfo.h	Finish renaming remaining analyzeBranch functions	2016-09-14 20:43:16 +00:00
HexagonInstrInfo.td	This reapplies r281304. The issue was that I had missed	2016-09-14 08:20:03 +00:00
HexagonInstrInfoV3.td	[Hexagon] Standardize pseudo-instructions for calls and returns	2016-08-12 11:12:02 +00:00
HexagonInstrInfoV4.td	[Hexagon] Fix incorrect generation of S4_subi_asl_ri	2016-08-19 16:35:05 +00:00
HexagonInstrInfoV5.td	[Hexagon] Improvements to handling and generation of FP instructions	2016-08-19 13:34:31 +00:00
HexagonInstrInfoV60.td	[Hexagon] Clean up some miscellaneous V60 intrinsics a bit	2016-08-16 17:14:44 +00:00
HexagonInstrInfoVector.td	[Hexagon] Standardize next batch of pseudo instructions	2016-08-16 18:08:40 +00:00
HexagonIntrinsics.td
HexagonIntrinsicsDerived.td
HexagonIntrinsicsV3.td
HexagonIntrinsicsV4.td
HexagonIntrinsicsV5.td
HexagonIntrinsicsV60.td	[Hexagon] Clean up some miscellaneous V60 intrinsics a bit	2016-08-16 17:14:44 +00:00
HexagonISelDAGToDAG.cpp	getVectorElementType().getSizeInBits() -> getScalarSizeInBits() ; NFCI	2016-09-14 16:37:15 +00:00
HexagonISelLowering.cpp	getVectorElementType().getSizeInBits() -> getScalarSizeInBits() ; NFCI	2016-09-14 16:37:15 +00:00
HexagonISelLowering.h	[Hexagon] Better handling of HVX vector lowering	2016-09-13 21:16:07 +00:00
HexagonIsetDx.td	[Hexagon] Make p0 an explicit operand in VA1_clr* subinstructions, NFC	2016-08-19 15:17:19 +00:00
HexagonMachineFunctionInfo.cpp
HexagonMachineFunctionInfo.h	[Hexagon] Do not cache alloca instructions during isel	2016-08-19 18:46:13 +00:00
HexagonMachineScheduler.cpp	Move helpers into anonymous namespaces. NFC.	2016-08-06 11:13:10 +00:00
HexagonMachineScheduler.h	Use the range variant of find instead of unpacking begin/end	2016-08-11 22:21:41 +00:00
HexagonMCInstLower.cpp
HexagonNewValueJump.cpp	MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it	2016-08-25 01:27:13 +00:00
HexagonOperands.td	[Hexagon] Improve patterns with stack-based addressing	2016-07-15 15:35:52 +00:00
HexagonOptAddrMode.cpp	[Hexagon] Referencify MachineInstr in HexagonInstrInfo, NFC	2016-07-29 21:49:42 +00:00
HexagonOptimizeSZextends.cpp	CodeGen: Remove MachineFunctionAnalysis => Enable (Machine)ModulePasses	2016-08-24 01:52:46 +00:00
HexagonPeephole.cpp	[Hexagon] Clear kill flags from modified registers in peephole optimizer	2016-08-04 14:17:16 +00:00
HexagonRDF.cpp	[RDF] Add initial support for lane masks in the DFG	2016-09-22 21:01:24 +00:00
HexagonRDF.h	[RDF] Add initial support for lane masks in the DFG	2016-09-22 21:01:24 +00:00
HexagonRDFOpt.cpp	MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it	2016-08-25 01:27:13 +00:00
HexagonRegisterInfo.cpp	[Hexagon] Improvements to handling and generation of FP instructions	2016-08-19 13:34:31 +00:00
HexagonRegisterInfo.h
HexagonRegisterInfo.td	[Hexagon] Remove USR_OVF from CtrRegs register class	2016-09-22 20:59:41 +00:00
HexagonSchedule.td
HexagonScheduleV4.td	[Hexagon] Update instruction itineraries	2016-07-15 16:58:34 +00:00
HexagonScheduleV55.td	[Hexagon] Update instruction itineraries	2016-07-15 16:58:34 +00:00
HexagonScheduleV60.td	[Hexagon] Update instruction itineraries	2016-07-15 16:58:34 +00:00
HexagonSelectionDAGInfo.cpp	[Hexagon] Add target feature to generate long calls	2016-07-25 14:42:11 +00:00
HexagonSelectionDAGInfo.h	[Hexagon] Add explicit default constructor for HexagonSelectionDAGInfo	2016-08-19 15:13:54 +00:00
HexagonSplitConst32AndConst64.cpp	MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it	2016-08-25 01:27:13 +00:00
HexagonSplitDouble.cpp	Replace a few more "fall through" comments with LLVM_FALLTHROUGH	2016-08-17 20:30:52 +00:00
HexagonStoreWidening.cpp
HexagonSubtarget.cpp	[Hexagon] segv while processing SUnit with nullNodePtr	2016-09-17 16:21:09 +00:00
HexagonSubtarget.h	[Hexagon] Referencify MachineInstr in HexagonInstrInfo, NFC	2016-07-29 21:49:42 +00:00
HexagonSystemInst.td
HexagonTargetMachine.cpp	[Hexagon] Change insertion of expand-condsets pass to avoid memory leaks	2016-08-24 22:27:36 +00:00
HexagonTargetMachine.h
HexagonTargetObjectFile.cpp	Move the Mangler from the AsmPrinter down to TLOF and clean up the	2016-09-16 07:33:15 +00:00
HexagonTargetObjectFile.h	Move the Mangler from the AsmPrinter down to TLOF and clean up the	2016-09-16 07:33:15 +00:00
HexagonTargetStreamer.h
HexagonTargetTransformInfo.cpp	[Hexagon] Consider zext/sext of a load to i32 to be free	2016-08-19 14:22:07 +00:00
HexagonTargetTransformInfo.h	[Hexagon] Consider zext/sext of a load to i32 to be free	2016-08-19 14:22:07 +00:00
HexagonVectorPrint.cpp	[Hexagon] vector store print tracing.	2016-08-25 13:35:48 +00:00
HexagonVLIWPacketizer.cpp	MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it	2016-08-25 01:27:13 +00:00
HexagonVLIWPacketizer.h	[Hexagon] Referencify MachineInstr in HexagonInstrInfo, NFC	2016-07-29 21:49:42 +00:00
LLVMBuild.txt	[Hexagon] Make HexagonCodeGen depend on Scalar	2016-07-22 17:23:46 +00:00
RDFCopy.cpp
RDFCopy.h
RDFDeadCode.cpp
RDFDeadCode.h
RDFGraph.cpp	[RDF] Add initial support for lane masks in the DFG	2016-09-22 21:01:24 +00:00
RDFGraph.h	[RDF] Add initial support for lane masks in the DFG	2016-09-22 21:01:24 +00:00
RDFLiveness.cpp	[RDF] Add initial support for lane masks in the DFG	2016-09-22 21:01:24 +00:00
RDFLiveness.h	[RDF] Fix liveness analysis for phi nodes with shadow uses	2016-09-07 20:37:05 +00:00