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Post-RA sched strategy and scheduling instruction annotations for z196, zEC12 and z13. This scheduler optimizes decoder grouping and balances processor resources (including side steering the FPd unit instructions). The SystemZHazardRecognizer keeps track of the scheduling state, which can be dumped with -debug-only=misched. Reviers: Ulrich Weigand, Andrew Trick. https://reviews.llvm.org/D17260 llvm-svn: 284704
84 lines
3.2 KiB
LLVM
84 lines
3.2 KiB
LLVM
; Test multiple return values (LLVM ABI extension)
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
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; Up to eight vector return values fit into VRs.
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define { <2 x double>, <2 x double>, <2 x double>, <2 x double>,
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<2 x double>, <2 x double>, <2 x double>, <2 x double> } @f1() {
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; CHECK-LABEL: f1:
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; CHECK: larl [[TMP:%r[0-5]]], .LCPI
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; CHECK: vl %v24, 0([[TMP]])
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; CHECK: larl [[TMP:%r[0-5]]], .LCPI
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; CHECK: vl %v26, 0([[TMP]])
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; CHECK: larl [[TMP:%r[0-5]]], .LCPI
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; CHECK: vl %v28, 0([[TMP]])
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; CHECK: larl [[TMP:%r[0-5]]], .LCPI
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; CHECK: vl %v30, 0([[TMP]])
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; CHECK: larl [[TMP:%r[0-5]]], .LCPI
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; CHECK: vl %v25, 0([[TMP]])
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; CHECK: larl [[TMP:%r[0-5]]], .LCPI
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; CHECK: vl %v27, 0([[TMP]])
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; CHECK: larl [[TMP:%r[0-5]]], .LCPI
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; CHECK: vl %v29, 0([[TMP]])
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; CHECK: larl [[TMP:%r[0-5]]], .LCPI
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; CHECK: vl %v31, 0([[TMP]])
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; CHECK: br %r14
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ret { <2 x double>, <2 x double>, <2 x double>, <2 x double>,
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<2 x double>, <2 x double>, <2 x double>, <2 x double> }
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{ <2 x double> <double 1.0, double 1.1>,
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<2 x double> <double 2.0, double 2.1>,
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<2 x double> <double 3.0, double 3.1>,
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<2 x double> <double 4.0, double 4.1>,
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<2 x double> <double 5.0, double 5.1>,
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<2 x double> <double 6.0, double 6.1>,
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<2 x double> <double 7.0, double 7.1>,
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<2 x double> <double 8.0, double 8.1> }
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}
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; More than eight vector return values use sret.
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define { <2 x double>, <2 x double>, <2 x double>, <2 x double>,
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<2 x double>, <2 x double>, <2 x double>, <2 x double>,
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<2 x double> } @f2() {
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; CHECK-LABEL: f2:
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; CHECK: larl [[TMP:%r[0-5]]], .LCPI
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; CHECK: vl [[VTMP:%v[0-9]+]], 0([[TMP]])
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; CHECK-DAG: vst [[VTMP]], 128(%r2)
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; CHECK-DAG: larl [[TMP:%r[0-5]]], .LCPI
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; CHECK: vl [[VTMP:%v[0-9]+]], 0([[TMP]])
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; CHECK-DAG: vst [[VTMP]], 112(%r2)
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; CHECK-DAG: larl [[TMP:%r[0-5]]], .LCPI
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; CHECK: vl [[VTMP:%v[0-9]+]], 0([[TMP]])
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; CHECK-DAG: vst [[VTMP]], 96(%r2)
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; CHECK-DAG: larl [[TMP:%r[0-5]]], .LCPI
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; CHECK: vl [[VTMP:%v[0-9]+]], 0([[TMP]])
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; CHECK-DAG: vst [[VTMP]], 80(%r2)
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; CHECK-DAG: larl [[TMP:%r[0-5]]], .LCPI
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; CHECK: vl [[VTMP:%v[0-9]+]], 0([[TMP]])
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; CHECK-DAG: vst [[VTMP]], 64(%r2)
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; CHECK-DAG: larl [[TMP:%r[0-5]]], .LCPI
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; CHECK: vl [[VTMP:%v[0-9]+]], 0([[TMP]])
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; CHECK-DAG: vst [[VTMP]], 48(%r2)
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; CHECK-DAG: larl [[TMP:%r[0-5]]], .LCPI
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; CHECK: vl [[VTMP:%v[0-9]+]], 0([[TMP]])
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; CHECK-DAG: vst [[VTMP]], 32(%r2)
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; CHECK-DAG: larl [[TMP:%r[0-5]]], .LCPI
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; CHECK: vl [[VTMP:%v[0-9]+]], 0([[TMP]])
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; CHECK-DAG: vst [[VTMP]], 16(%r2)
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; CHECK-DAG: larl [[TMP:%r[0-5]]], .LCPI
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; CHECK: vl [[VTMP:%v[0-9]+]], 0([[TMP]])
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; CHECK: vst [[VTMP]], 0(%r2)
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; CHECK: br %r14
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ret { <2 x double>, <2 x double>, <2 x double>, <2 x double>,
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<2 x double>, <2 x double>, <2 x double>, <2 x double>,
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<2 x double> }
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{ <2 x double> <double 1.0, double 1.1>,
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<2 x double> <double 2.0, double 2.1>,
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<2 x double> <double 3.0, double 3.1>,
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<2 x double> <double 4.0, double 4.1>,
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<2 x double> <double 5.0, double 5.1>,
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<2 x double> <double 6.0, double 6.1>,
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<2 x double> <double 7.0, double 7.1>,
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<2 x double> <double 8.0, double 8.1>,
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<2 x double> <double 9.0, double 9.1> }
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}
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