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Nicolai Haehnle 494b4aee1e AMDGPU/SI: Add llvm.amdgcn.s.waitcnt.all intrinsic
Summary:
So it appears that to guarantee some of the ordering requirements of a GLSL
memoryBarrier() executed in the shader, we need to emit an s_waitcnt.

(We can't use an s_barrier, because memoryBarrier() may appear anywhere in
the shader, in particular it may appear in non-uniform control flow.)

Reviewers: arsenm, mareko, tstellarAMD

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D19203

llvm-svn: 267729
2016-04-27 15:46:01 +00:00
2016-04-27 05:59:51 +00:00
2016-01-26 21:29:08 +00:00
2014-04-07 03:57:04 +00:00
2014-03-02 13:08:46 +00:00
2016-01-26 21:29:08 +00:00
2016-03-30 22:41:06 +00:00
2016-01-04 19:13:29 +00:00

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