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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-23 11:13:28 +01:00
llvm-mirror/test/CodeGen
Petar Avramovic 4b729fba3d [MIPS GlobalISel] Select count trailing zeros
llvm.cttz.<type> intrinsic has additional i1 argument is_zero_undef,
it tells whether zero as the first argument produces a defined result.
G_CTTZ is generated from llvm.cttz.<type> (<type> <src>, i1 false)
intrinsics, clang generates these intrinsics from __builtin_ctz and
__builtin_ctzll.
G_CTTZ_ZERO_UNDEF comes from llvm.cttz.<type> (<type> <src>, i1 true).
Clang generates such intrinsics as parts of expansion of builtin_ffs
and builtin_ffsll. It is also traditionally part of and many
algorithms that are now predicated on avoiding zero-value inputs.

Add narrow scalar (algorithm uses G_CTTZ_ZERO_UNDEF) for G_CTTZ.
Lower G_CTTZ and G_CTTZ_ZERO_UNDEF for MIPS32.

Differential Revision: https://reviews.llvm.org/D73215
2020-01-27 09:51:06 +01:00
..
AArch64 [PatchableFunction] Allow empty entry MachineBasicBlock 2020-01-24 09:42:48 -08:00
AMDGPU [TargetLowering] SimplifyDemandedBits - Remove ashr if all our demandedbits already match the sign bit 2020-01-25 17:36:46 +00:00
ARC
ARM Allow combining of extract_subvector to extract element 2020-01-24 10:50:26 -08:00
AVR
BPF
Generic
Hexagon [Hexagon] Add REQUIRES: asserts to a testcase using -debug-only 2020-01-21 13:22:01 -06:00
Inputs
Lanai
Mips [MIPS GlobalISel] Select count trailing zeros 2020-01-27 09:51:06 +01:00
MIR
MSP430
NVPTX Consolidate internal denormal flushing controls 2020-01-17 20:09:53 -05:00
PowerPC [PowerPC][Future] Add prefixed instruction paddi to future CPU 2020-01-24 07:27:25 -06:00
RISCV [TargetLowering] SimplifyDemandedBits - Remove ashr if all our demandedbits already match the sign bit 2020-01-25 17:36:46 +00:00
SPARC
SystemZ Update spelling of {analyze,insert,remove}Branch in strings and comments 2020-01-21 10:15:38 -06:00
Thumb
Thumb2 [ARM] Use reduction intrinsics for larger than legal reductions 2020-01-24 17:07:24 +00:00
VE [VE] global variable isel patterns 2020-01-24 17:35:14 +01:00
WebAssembly [WebAssembly] Update bleeding-edge CPU features 2020-01-24 14:27:35 -08:00
WinCFGuard
WinEH
X86 [X86][AVX] Extend combineCommutableSHUFP to handle v8f32 and v16f32 commutable shufps patterns 2020-01-26 19:04:12 +00:00
XCore