llvm-mirror

mirror of https://github.com/RPCS3/llvm-mirror.git synced 2025-02-01 05:01:59 +01:00

History

Thomas Lively 4be6d4a9bc [WebAssembly] Make returns variadic

Summary:
This is necessary and sufficient to get simple cases of multiple
return working with multivalue enabled. More complex cases will
require block and loop signatures to be generalized to potentially be
type indices as well.

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D68684

llvm-svn: 374235

2019-10-09 21:42:08 +00:00

AArch64

[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing

2019-09-11 11:16:48 +00:00

AMDGPU

[AMDGPU] Extend buffer intrinsics with swizzling

2019-10-02 17:22:36 +00:00

ARM

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

Generic

[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing

2019-09-11 11:16:48 +00:00

Hexagon

[DebugInfo] Allow bundled calls in the MIR's call site info

2019-08-19 12:41:22 +00:00

Mips

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

NVPTX

[MIR] Repurposing '$' sigil used by external symbols. Replacing with '&'.

2018-01-10 00:56:48 +00:00

PowerPC

[PowerPC][NFC] Move codegen tests to PowerPC from MIR/PowerPC

2019-09-13 14:18:36 +00:00

WebAssembly

[WebAssembly] Make returns variadic

2019-10-09 21:42:08 +00:00

X86

Add a missing space in a MIR parser error message

2019-09-20 14:41:41 +00:00

README

…

README

This directory contains tests for the MIR file format parser and printer. It
was necessary to split the tests across different targets as no single target
covers all features available in machine IR.

Tests for codegen passes should NOT be here but in test/CodeGen/sometarget. As
a rule of thumb this directory should only contain tests using
'llc -run-pass none'.