Ben Shi 2a099fbc14 [AVR] Optimize the 16-bit NEGW pseudo instruction ... Reviewed By: dylanmckay Differential Revision: https://reviews.llvm.org/D88658		2020-11-17 17:51:58 +08:00
..
atomics
calling-conv/c
features
inline-asm
integration
intrinsics
pseudo	[AVR] Optimize the 16-bit NEGW pseudo instruction	2020-11-17 17:51:58 +08:00
relax-mem
add.ll
alloca.ll
and.ll
avr-rust-issue-123.ll
branch-relaxation-long.ll
branch-relaxation.ll
brind.ll
call.ll
clear-bss.ll
cmp.ll
com.ll
copy-data-to-ram.ll
ctlz.ll
ctpop.ll
cttz.ll
directmem.ll
div.ll
dynalloca.ll
eor.ll
expand-integer-failure.ll
frame.ll
frmidx-iterator-bug.ll
hardware-mul.ll
high-pressure-on-ptrregs.ll
icall-func-pointer-correct-addr-space.ll
impossible-reg-to-reg-copy.ll
interrupts.ll
io.ll
issue-cannot-select-bswap.ll
issue-regalloc-stackframe-folding-earlyclobber.ll
jmp-long.ll
large-return-size.ll
lit.local.cfg
load.ll
lower-formal-args-struct-return.ll
lower-formal-arguments-assertion.ll
neg.ll	[AVR] Optimize the 16-bit NEGW pseudo instruction	2020-11-17 17:51:58 +08:00
no-print-operand-twice.ll
or.ll
PR31344.ll
PR31345.ll
PR37143.ll
pre-schedule.ll
progmem-extended.ll
progmem.ll
rem.ll
return.ll
rot.ll
runtime-trig.ll
rust-avr-bug-37.ll
rust-avr-bug-95.ll
rust-avr-bug-99.ll
rust-avr-bug-112.ll
sections.ll
select-must-add-unconditional-jump.ll
sext.ll
shift.ll
sign-extension.ll
smul-with-overflow.ll
software-mul.ll
std-ldd-immediate-overflow.ll
store-undef.ll
store.ll
sub.ll
trunc.ll
umul-with-overflow.ll
umul.with.overflow.i16-bug.ll
unaligned-atomic-loads.ll
varargs.ll
xor.ll
zext.ll