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4cd719403f
llvm-mirror/lib/Target/AArch64
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Daniel Sanders 4cd719403f [globalisel][tablegen] Revise API for ComplexPattern operands to improve flexibility. 
Summary:
Some targets need to be able to do more complex rendering than just adding an
operand or two to an instruction. For example, it may need to insert an
instruction to extract a subreg first, or it may need to perform an operation
on the operand.

In SelectionDAG, targets would create SDNode's to achieve the desired effect
during the complex pattern predicate. This worked because SelectionDAG had a
form of garbage collection that would take care of SDNode's that were created
but not used due to a later predicate rejecting a match. This doesn't translate
well to GlobalISel and the churn was wasteful.

The API changes in this patch enable GlobalISel to accomplish the same thing
without the waste. The API is now:
	InstructionSelector::OptionalComplexRendererFn selectArithImmed(MachineOperand &Root) const;
where Root is the root of the match. The return value can be omitted to
indicate that the predicate failed to match, or a function with the signature
ComplexRendererFn can be returned. For example:
	return OptionalComplexRendererFn(
	       [=](MachineInstrBuilder &MIB) { MIB.addImm(Immed).addImm(ShVal); });
adds two immediate operands to the rendered instruction. Immed and ShVal are
captured from the predicate function.

As an added bonus, this also reduces the amount of information we need to
provide to GIComplexOperandMatcher.

Depends on D31418

Reviewers: aditya_nandakumar, t.p.northover, qcolombet, rovka, ab, javed.absar

Reviewed By: ab

Subscribers: dberris, kristof.beyls, igorb, llvm-commits

Differential Revision: https://reviews.llvm.org/D31761

llvm-svn: 301079
2017-04-22 15:11:04 +00:00
..
AsmParser [AArch64] Fix handling of zero immediate in fmov instructions 2017-04-20 10:13:54 +00:00
Disassembler [AArch64, Lanai] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC). 2017-01-06 00:30:53 +00:00
InstPrinter AArch64: lower "fence singlethread" to a pure compiler barrier. 2017-04-20 21:57:45 +00:00
MCTargetDesc AArch64: lower "fence singlethread" to a pure compiler barrier. 2017-04-20 21:57:45 +00:00
TargetInfo Move the global variables representing each Target behind accessor function 2016-10-09 23:00:34 +00:00
Utils [AArch64AsmParser] rewrite of function parseSysAlias 2017-03-03 08:12:47 +00:00
AArch64.h [globalisel][tablegen] Move <Target>InstructionSelector declarations to anonymous namespaces 2017-04-06 09:49:34 +00:00
AArch64.td [AArch64] Crypto requires FP. 2017-04-05 10:44:38 +00:00
AArch64A53Fix835769.cpp Use StringRef in Pass/PassManager APIs (NFC) 2016-10-01 02:56:57 +00:00
AArch64A57FPLoadBalancing.cpp LiveRegUnits: Add accumulateBackward() function 2017-01-21 02:21:04 +00:00
AArch64AddressTypePromotion.cpp [AArch64] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC). 2017-01-25 00:29:26 +00:00
AArch64AdvSIMDScalarPass.cpp Use StringRef in Pass/PassManager APIs (NFC) 2016-10-01 02:56:57 +00:00
AArch64AsmPrinter.cpp [XRay] Merge instrumentation point table emission code into AsmPrinter. 2017-01-03 04:30:21 +00:00
AArch64CallingConvention.h
AArch64CallingConvention.td SwiftCC: swifterror register cannot be as the base register 2017-02-09 01:52:17 +00:00
AArch64CallLowering.cpp Rename AttributeSet to AttributeList 2017-03-21 16:57:19 +00:00
AArch64CallLowering.h [GlobalISel] Use the correct calling conv for calls 2017-03-20 14:40:18 +00:00
AArch64CleanupLocalDynamicTLSPass.cpp Use StringRef in Pass/PassManager APIs (NFC) 2016-10-01 02:56:57 +00:00
AArch64CollectLOH.cpp AArch64CollectLOH: Rewrite as block-local analysis. 2017-01-06 19:22:01 +00:00
AArch64ConditionalCompares.cpp [CodeGen] Rename MachineInstrBuilder::addOperand. NFC 2017-01-13 09:58:52 +00:00
AArch64ConditionOptimizer.cpp [CodeGen] Rename MachineInstrBuilder::addOperand. NFC 2017-01-13 09:58:52 +00:00
AArch64DeadRegisterDefinitionsPass.cpp AArch64: Use DeadRegisterDefinitionsPass before regalloc. 2016-11-16 03:38:27 +00:00
AArch64ExpandPseudoInsts.cpp AArch64: lower "fence singlethread" to a pure compiler barrier. 2017-04-20 21:57:45 +00:00
AArch64FastISel.cpp [AArch64][Fuchsia] Allow -mcmodel=kernel for --target=aarch64-fuchsia 2017-04-04 19:51:53 +00:00
AArch64FrameLowering.cpp AArch64FrameLowering: Check if the ExtraCSSpill register is actually unused 2017-04-21 22:42:08 +00:00
AArch64FrameLowering.h
AArch64GenRegisterBankInfo.def GlobalISel: fall back gracefully when we can't map an operand's size. 2017-02-06 21:57:06 +00:00
AArch64InstrAtomics.td AArch64: lower "fence singlethread" to a pure compiler barrier. 2017-04-20 21:57:45 +00:00
AArch64InstrFormats.td [globalisel][tablegen] Revise API for ComplexPattern operands to improve flexibility. 2017-04-22 15:11:04 +00:00
AArch64InstrInfo.cpp Re-commit r301040 "X86: Don't emit zero-byte functions on Windows" 2017-04-21 21:48:41 +00:00
AArch64InstrInfo.h Re-commit r301040 "X86: Don't emit zero-byte functions on Windows" 2017-04-21 21:48:41 +00:00
AArch64InstrInfo.td [AArch64] Fix handling of zero immediate in fmov instructions 2017-04-20 10:13:54 +00:00
AArch64InstructionSelector.cpp [globalisel][tablegen] Revise API for ComplexPattern operands to improve flexibility. 2017-04-22 15:11:04 +00:00
AArch64ISelDAGToDAG.cpp [APInt] Use lshrInPlace to replace lshr where possible 2017-04-18 17:14:21 +00:00
AArch64ISelLowering.cpp [AArch64] Improve code generation for logical instructions taking 2017-04-21 18:53:12 +00:00
AArch64ISelLowering.h [AArch64] Improve code generation for logical instructions taking 2017-04-21 18:53:12 +00:00
AArch64LegalizerInfo.cpp GlobalISel: constrain G_INSERT to inserting just one value per instruction. 2017-03-03 23:05:47 +00:00
AArch64LegalizerInfo.h GlobalISel: legalize va_arg on AArch64. 2017-02-15 23:22:50 +00:00
AArch64LoadStoreOptimizer.cpp [AArch64] Use alias analysis in the load/store optimization pass. 2017-03-17 14:19:55 +00:00
AArch64MachineFunctionInfo.h [AArch64, Lanai] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC). 2017-01-06 00:30:53 +00:00
AArch64MacroFusion.cpp [AArch64] Simplify MacroFusion 2017-04-11 19:13:11 +00:00
AArch64MacroFusion.h [CodeGen] Move MacroFusion to the target 2017-02-01 02:54:34 +00:00
AArch64MCInstLower.cpp Remove TargetTriple from AArch64MCInstLower as it's used in few places 2016-10-01 01:50:25 +00:00
AArch64MCInstLower.h
AArch64PBQPRegAlloc.cpp
AArch64PBQPRegAlloc.h
AArch64PerfectShuffle.h
AArch64PromoteConstant.cpp Use StringRef in Pass/PassManager APIs (NFC) 2016-10-01 02:56:57 +00:00
AArch64RedundantCopyElimination.cpp [AArch64][Redundant Copy Elim] Add support for CMN and shifted imm. 2017-03-06 21:20:00 +00:00
AArch64RegisterBankInfo.cpp [GlobalISel] Support vector-of-pointers in LLT 2017-04-19 07:23:57 +00:00
AArch64RegisterBankInfo.h GlobalISel: fall back gracefully when we can't map an operand's size. 2017-02-06 21:57:06 +00:00
AArch64RegisterBanks.td Re-commit: [globalisel] Tablegen-erate current Register Bank Information 2017-01-19 11:15:55 +00:00
AArch64RegisterInfo.cpp AArch64RegisterInfo: Simplify getReservedReg(); NFC 2017-02-02 02:23:25 +00:00
AArch64RegisterInfo.h AArch64: Enable post-ra liveness updates 2016-12-16 23:55:43 +00:00
AArch64RegisterInfo.td [AArch64] Corrected spill size for DDD register class. NFCI 2016-10-21 09:53:42 +00:00
AArch64SchedA53.td [MachineScheduler] Reference the correct header. 2017-03-26 21:27:21 +00:00
AArch64SchedA57.td [AArch64] Add new subtarget feature to fuse AES crypto operations 2017-02-01 02:54:39 +00:00
AArch64SchedA57WriteRes.td [AArch64] Cortex-A57 FDIV/FSQRT scheduling fix (W-unit) 2016-12-23 12:51:41 +00:00
AArch64SchedCyclone.td
AArch64SchedFalkor.td [AArch64][Falkor] Fix number of microops for WriteSTIdx missed in r300892. 2017-04-21 13:37:01 +00:00
AArch64SchedFalkorDetails.td [AArch64][Falkor] Refine modeling of store-release exclusive instructions. 2017-04-21 14:58:32 +00:00
AArch64SchedFalkorWriteRes.td [AArch64][Falkor] Refine modeling of store-release exclusive instructions. 2017-04-21 14:58:32 +00:00
AArch64SchedKryo.td
AArch64SchedKryoDetails.td [AArch64] Refine Kryo Machine Model 2017-01-26 20:10:41 +00:00
AArch64SchedM1.td [AArch64] Add new subtarget feature to fuse AES crypto operations 2017-02-01 02:54:39 +00:00
AArch64SchedThunderX2T99.td [AArch64] Vulcan is now ThunderXT99 2017-03-07 19:42:40 +00:00
AArch64SchedThunderX.td [AArch64] Vulcan is now ThunderXT99 2017-03-07 19:42:40 +00:00
AArch64Schedule.td
AArch64SelectionDAGInfo.cpp [AArch64] Drive-by cleanup, make this code shorter. NFCI. 2017-03-22 23:37:58 +00:00
AArch64SelectionDAGInfo.h
AArch64StorePairSuppress.cpp Use StringRef in Pass/PassManager APIs (NFC) 2016-10-01 02:56:57 +00:00
AArch64Subtarget.cpp AArch64: put nonlazybind special handling behind a flag for now. 2017-04-17 18:18:47 +00:00
AArch64Subtarget.h AArch64: support nonlazybind 2017-04-17 17:27:56 +00:00
AArch64SystemOperands.td AArch64InstPrinter: rewrite of printSysAlias 2017-02-27 14:45:34 +00:00
AArch64TargetMachine.cpp [globalisel][tablegen] Move <Target>InstructionSelector declarations to anonymous namespaces 2017-04-06 09:49:34 +00:00
AArch64TargetMachine.h [globalisel][tablegen] Move <Target>InstructionSelector declarations to anonymous namespaces 2017-04-06 09:49:34 +00:00
AArch64TargetObjectFile.cpp CodeGen: simplify TargetMachine::getSymbol interface. NFC. 2016-11-22 16:17:20 +00:00
AArch64TargetObjectFile.h Move the Mangler from the AsmPrinter down to TLOF and clean up the 2016-09-16 07:33:15 +00:00
AArch64TargetTransformInfo.cpp [SystemZ] TargetTransformInfo cost functions implemented. 2017-04-12 11:49:08 +00:00
AArch64TargetTransformInfo.h [SystemZ] TargetTransformInfo cost functions implemented. 2017-04-12 11:49:08 +00:00
AArch64VectorByElementOpt.cpp [AArch64] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC). 2017-01-25 00:29:26 +00:00
CMakeLists.txt [CodeGen] Move MacroFusion to the target 2017-02-01 02:54:34 +00:00
LLVMBuild.txt