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43a4d1cdda
- Eliminate redundant COPYs from the same register & subregister pair. Differential Revision: https://reviews.llvm.org/D87939
28 lines
1.2 KiB
LLVM
28 lines
1.2 KiB
LLVM
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx906 -verify-machineinstrs -o - %s | FileCheck %s
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target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-ni:7"
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target triple = "amdgcn-amd-amdhsa"
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; CHECK-LABEL: {{^}}t0:
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; CHECK: s_load_dwordx2 s{{\[}}[[PTR_LO:[0-9]+]]:[[PTR_HI:[0-9]+]]], s[4:5], 0x0
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; CHECK: v_mov_b32_e32 v{{[0-9]+}}, s[[PTR_HI]]
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; There should be no redundant copies from PTR_HI.
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; CHECK-NOT: v_mov_b32_e32 v{{[0-9]+}}, s[[PTR_HI]]
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define protected amdgpu_kernel void @t0(float addrspace(1)* %p, i32 %i0, i32 %j0, i32 %k0) {
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entry:
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%0 = tail call i32 @llvm.amdgcn.workitem.id.x()
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%i = add i32 %0, %i0
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%j = add i32 %0, %j0
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%k = add i32 %0, %k0
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%pi = getelementptr float, float addrspace(1)* %p, i32 %i
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%vi = load float, float addrspace(1)* %pi
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%pj = getelementptr float, float addrspace(1)* %p, i32 %j
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%vj = load float, float addrspace(1)* %pj
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%sum = fadd float %vi, %vj
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%pk = getelementptr float, float addrspace(1)* %p, i32 %k
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store float %sum, float addrspace(1)* %pk
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ret void
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}
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declare i32 @llvm.amdgcn.workitem.id.x()
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