David Green 4d9d8789ad [ARM] Implement isLoad/StoreFromStackSlot for MVE stack stores accesses ... This implements the isLoadFromStackSlot and isStoreToStackSlot for MVE MVE_VSTRWU32 and MVE_VLDRWU32 functions. They behave the same as many other loads/stores, expecting a FI in Op1 and zero offset in Op2. At the same time this alters VLDR_P0_off and VSTR_P0_off to use the same code too, as they too should be returning VPR in Op0, take a FI in Op1 and zero offset in Op2. Differential Revision: https://reviews.llvm.org/D106797		2021-07-27 09:11:58 +01:00
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Analysis	[Analysis] Fix getOrderedReductionCost to call target's getArithmeticInstrCost implementation	2021-07-26 17:15:43 +01:00
Assembler
Bindings
Bitcode
BugPoint
CodeGen	[ARM] Implement isLoad/StoreFromStackSlot for MVE stack stores accesses	2021-07-27 09:11:58 +01:00
DebugInfo	[CodeView] Saturate values bigger than supported by APInt.	2021-07-26 22:15:26 +02:00
Demangle
Examples
ExecutionEngine	[JITLink][RISCV] Run new test from 0ad562b48 only if the RISCV backend is enabled	2021-07-25 10:47:26 -04:00
Feature
FileCheck
Instrumentation
Integer
JitListener
Linker	[IR] Rename comdat noduplicates to comdat nodeduplicate	2021-07-20 12:47:10 -07:00
LTO
MachineVerifier
MC	[PowerPC]Add addex instruction definition and MC tests	2021-07-26 14:55:38 -05:00
Object	[llvm-readobj] Display multiple function names for stack size entries	2021-07-26 14:49:53 +01:00
ObjectYAML	[yaml2obj][MachO] Rename PayloadString to Content	2021-07-26 09:04:51 -07:00
Other
SafepointIRVerifier
Support	[llvm-readobj] Switch command line parsing from llvm::cl to OptTable	2021-07-12 10:14:42 -07:00
SymbolRewriter
TableGen
ThinLTO/X86
tools	[Debug-Info][llvm-dwarfdump] Don't try to dump location	2021-07-27 07:28:59 +00:00
Transforms	[LoopFlatten] Use SCEV and Loop APIs to identify increment and trip count	2021-07-27 08:42:59 +01:00
Unit
Verifier
YAMLParser
.clang-format
CMakeLists.txt
lit.cfg.py
lit.site.cfg.py.in
TestRunner.sh