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4033a61f5d
The current implementation of skip insertion (SIInsertSkip) makes it a mandatory pass required for correctness. Initially, the idea was to have an optional pass. This patch inserts the s_cbranch_execz upfront during SILowerControlFlow to skip over the sections of code when no lanes are active. Later, SIRemoveShortExecBranches removes the skips for short branches, unless there is a sideeffect and the skip branch is really necessary. This new pass will replace the handling of skip insertion in the existing SIInsertSkip Pass. Differential revision: https://reviews.llvm.org/D68092
65 lines
1.4 KiB
LLVM
65 lines
1.4 KiB
LLVM
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=hawaii < %s | FileCheck -enable-var-scope -check-prefix=GCN %s
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; A call should be skipped if all lanes are zero, since we don't know
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; what side effects should be avoided inside the call.
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define hidden void @func() #1 {
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ret void
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}
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; GCN-LABEL: {{^}}if_call:
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; GCN: s_and_saveexec_b64
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; GCN-NEXT: s_cbranch_execz [[END:BB[0-9]+_[0-9]+]]
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; GCN: s_swappc_b64
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; GCN: [[END]]:
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define void @if_call(i32 %flag) #0 {
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%cc = icmp eq i32 %flag, 0
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br i1 %cc, label %call, label %end
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call:
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call void @func()
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br label %end
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end:
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ret void
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}
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; GCN-LABEL: {{^}}if_asm:
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; GCN: s_and_saveexec_b64
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; GCN-NEXT: s_cbranch_execz [[END:BB[0-9]+_[0-9]+]]
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; GCN: ; sample asm
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; GCN: [[END]]:
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define void @if_asm(i32 %flag) #0 {
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%cc = icmp eq i32 %flag, 0
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br i1 %cc, label %call, label %end
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call:
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call void asm sideeffect "; sample asm", ""()
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br label %end
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end:
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ret void
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}
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; GCN-LABEL: {{^}}if_call_kernel:
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; GCN: s_and_saveexec_b64
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; GCN-NEXT: s_cbranch_execz BB3_2
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; GCN: s_swappc_b64
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define amdgpu_kernel void @if_call_kernel() #0 {
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%id = call i32 @llvm.amdgcn.workitem.id.x()
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%cc = icmp eq i32 %id, 0
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br i1 %cc, label %call, label %end
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call:
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call void @func()
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br label %end
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end:
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ret void
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}
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declare i32 @llvm.amdgcn.workitem.id.x() #2
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attributes #0 = { nounwind }
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attributes #1 = { nounwind noinline }
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attributes #2 = { nounwind readnone speculatable }
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