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347 lines
11 KiB
LLVM
347 lines
11 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc %s -o - -mtriple=thumbv8m.base | \
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; RUN: FileCheck %s --check-prefix=CHECK-8B
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; RUN: llc %s -o - -mtriple=thumbebv8m.base | \
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; RUN: FileCheck %s --check-prefix=CHECK-8B
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; RUN: llc %s -o - -mtriple=thumbv8m.main | \
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; RUN: FileCheck %s --check-prefix=CHECK-8M
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; RUN: llc %s -o - -mtriple=thumbebv8m.main | \
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; RUN: FileCheck %s --check-prefix=CHECK-8M
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; RUN: llc %s -o - -mtriple=thumbv8.1m.main | \
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; RUN: FileCheck %s --check-prefix=CHECK-81M
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; RUN: llc %s -o - -mtriple=thumbebv8.1m.main | \
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; RUN: FileCheck %s --check-prefix=CHECK-81M
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define void @func1(void ()* nocapture %fptr) #0 {
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; CHECK-8B-LABEL: func1:
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; CHECK-8B: @ %bb.0: @ %entry
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; CHECK-8B-NEXT: push {r7, lr}
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; CHECK-8B-NEXT: push {r4, r5, r6, r7}
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; CHECK-8B-NEXT: mov r7, r11
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; CHECK-8B-NEXT: mov r6, r10
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; CHECK-8B-NEXT: mov r5, r9
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; CHECK-8B-NEXT: mov r4, r8
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; CHECK-8B-NEXT: push {r4, r5, r6, r7}
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; CHECK-8B-NEXT: mov r1, #1
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; CHECK-8B-NEXT: bics r0, r1
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; CHECK-8B-NEXT: mov r1, r0
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; CHECK-8B-NEXT: mov r2, r0
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; CHECK-8B-NEXT: mov r3, r0
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; CHECK-8B-NEXT: mov r4, r0
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; CHECK-8B-NEXT: mov r5, r0
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; CHECK-8B-NEXT: mov r6, r0
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; CHECK-8B-NEXT: mov r7, r0
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; CHECK-8B-NEXT: mov r8, r0
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; CHECK-8B-NEXT: mov r9, r0
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; CHECK-8B-NEXT: mov r10, r0
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; CHECK-8B-NEXT: mov r11, r0
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; CHECK-8B-NEXT: mov r12, r0
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; CHECK-8B-NEXT: msr apsr, r0
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; CHECK-8B-NEXT: blxns r0
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; CHECK-8B-NEXT: pop {r4, r5, r6, r7}
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; CHECK-8B-NEXT: mov r8, r4
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; CHECK-8B-NEXT: mov r9, r5
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; CHECK-8B-NEXT: mov r10, r6
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; CHECK-8B-NEXT: mov r11, r7
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; CHECK-8B-NEXT: pop {r4, r5, r6, r7}
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; CHECK-8B-NEXT: pop {r7}
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; CHECK-8B-NEXT: pop {r0}
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; CHECK-8B-NEXT: mov lr, r0
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; CHECK-8B-NEXT: mov r0, lr
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; CHECK-8B-NEXT: mov r1, lr
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; CHECK-8B-NEXT: mov r2, lr
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; CHECK-8B-NEXT: mov r3, lr
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; CHECK-8B-NEXT: mov r12, lr
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; CHECK-8B-NEXT: msr apsr, lr
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; CHECK-8B-NEXT: bxns lr
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;
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; CHECK-8M-LABEL: func1:
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; CHECK-8M: @ %bb.0: @ %entry
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; CHECK-8M-NEXT: push {r7, lr}
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; CHECK-8M-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11}
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; CHECK-8M-NEXT: bic r0, r0, #1
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; CHECK-8M-NEXT: msr apsr_nzcvq, r0
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; CHECK-8M-NEXT: mov r1, r0
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; CHECK-8M-NEXT: mov r2, r0
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; CHECK-8M-NEXT: mov r3, r0
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; CHECK-8M-NEXT: mov r4, r0
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; CHECK-8M-NEXT: mov r5, r0
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; CHECK-8M-NEXT: mov r6, r0
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; CHECK-8M-NEXT: mov r7, r0
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; CHECK-8M-NEXT: mov r8, r0
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; CHECK-8M-NEXT: mov r9, r0
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; CHECK-8M-NEXT: mov r10, r0
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; CHECK-8M-NEXT: mov r11, r0
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; CHECK-8M-NEXT: mov r12, r0
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; CHECK-8M-NEXT: blxns r0
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; CHECK-8M-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11}
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; CHECK-8M-NEXT: pop.w {r7, lr}
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; CHECK-8M-NEXT: mov r0, lr
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; CHECK-8M-NEXT: mov r1, lr
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; CHECK-8M-NEXT: mov r2, lr
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; CHECK-8M-NEXT: mov r3, lr
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; CHECK-8M-NEXT: mov r12, lr
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; CHECK-8M-NEXT: msr apsr_nzcvq, lr
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; CHECK-8M-NEXT: bxns lr
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;
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; CHECK-81M-LABEL: func1:
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; CHECK-81M: @ %bb.0: @ %entry
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; CHECK-81M-NEXT: vstr fpcxtns, [sp, #-4]!
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; CHECK-81M-NEXT: push {r7, lr}
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; CHECK-81M-NEXT: sub sp, #4
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; CHECK-81M-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11}
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; CHECK-81M-NEXT: bic r0, r0, #1
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; CHECK-81M-NEXT: sub sp, #136
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; CHECK-81M-NEXT: vlstm sp
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; CHECK-81M-NEXT: clrm {r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, apsr}
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; CHECK-81M-NEXT: blxns r0
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; CHECK-81M-NEXT: vlldm sp
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; CHECK-81M-NEXT: add sp, #136
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; CHECK-81M-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11}
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; CHECK-81M-NEXT: add sp, #4
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; CHECK-81M-NEXT: pop.w {r7, lr}
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; CHECK-81M-NEXT: vscclrm {s0, s1, s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, s13, s14, s15, vpr}
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; CHECK-81M-NEXT: vldr fpcxtns, [sp], #4
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; CHECK-81M-NEXT: clrm {r0, r1, r2, r3, r12, apsr}
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; CHECK-81M-NEXT: bxns lr
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entry:
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call void %fptr() #1
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ret void
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}
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attributes #0 = { "cmse_nonsecure_entry" nounwind }
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attributes #1 = { "cmse_nonsecure_call" nounwind }
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define void @func2(void ()* nocapture %fptr) #2 {
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; CHECK-8B-LABEL: func2:
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; CHECK-8B: @ %bb.0: @ %entry
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; CHECK-8B-NEXT: push {r7, lr}
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; CHECK-8B-NEXT: push {r4, r5, r6, r7}
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; CHECK-8B-NEXT: mov r7, r11
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; CHECK-8B-NEXT: mov r6, r10
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; CHECK-8B-NEXT: mov r5, r9
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; CHECK-8B-NEXT: mov r4, r8
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; CHECK-8B-NEXT: push {r4, r5, r6, r7}
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; CHECK-8B-NEXT: mov r1, #1
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; CHECK-8B-NEXT: bics r0, r1
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; CHECK-8B-NEXT: mov r1, r0
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; CHECK-8B-NEXT: mov r2, r0
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; CHECK-8B-NEXT: mov r3, r0
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; CHECK-8B-NEXT: mov r4, r0
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; CHECK-8B-NEXT: mov r5, r0
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; CHECK-8B-NEXT: mov r6, r0
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; CHECK-8B-NEXT: mov r7, r0
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; CHECK-8B-NEXT: mov r8, r0
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; CHECK-8B-NEXT: mov r9, r0
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; CHECK-8B-NEXT: mov r10, r0
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; CHECK-8B-NEXT: mov r11, r0
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; CHECK-8B-NEXT: mov r12, r0
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; CHECK-8B-NEXT: msr apsr, r0
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; CHECK-8B-NEXT: blxns r0
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; CHECK-8B-NEXT: pop {r4, r5, r6, r7}
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; CHECK-8B-NEXT: mov r8, r4
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; CHECK-8B-NEXT: mov r9, r5
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; CHECK-8B-NEXT: mov r10, r6
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; CHECK-8B-NEXT: mov r11, r7
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; CHECK-8B-NEXT: pop {r4, r5, r6, r7}
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; CHECK-8B-NEXT: pop {r7, pc}
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;
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; CHECK-8M-LABEL: func2:
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; CHECK-8M: @ %bb.0: @ %entry
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; CHECK-8M-NEXT: push {r7, lr}
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; CHECK-8M-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11}
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; CHECK-8M-NEXT: bic r0, r0, #1
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; CHECK-8M-NEXT: msr apsr_nzcvq, r0
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; CHECK-8M-NEXT: mov r1, r0
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; CHECK-8M-NEXT: mov r2, r0
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; CHECK-8M-NEXT: mov r3, r0
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; CHECK-8M-NEXT: mov r4, r0
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; CHECK-8M-NEXT: mov r5, r0
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; CHECK-8M-NEXT: mov r6, r0
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; CHECK-8M-NEXT: mov r7, r0
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; CHECK-8M-NEXT: mov r8, r0
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; CHECK-8M-NEXT: mov r9, r0
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; CHECK-8M-NEXT: mov r10, r0
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; CHECK-8M-NEXT: mov r11, r0
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; CHECK-8M-NEXT: mov r12, r0
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; CHECK-8M-NEXT: blxns r0
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; CHECK-8M-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11}
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; CHECK-8M-NEXT: pop {r7, pc}
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;
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; CHECK-81M-LABEL: func2:
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; CHECK-81M: @ %bb.0: @ %entry
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; CHECK-81M-NEXT: push {r7, lr}
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; CHECK-81M-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11}
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; CHECK-81M-NEXT: bic r0, r0, #1
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; CHECK-81M-NEXT: sub sp, #136
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; CHECK-81M-NEXT: vlstm sp
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; CHECK-81M-NEXT: clrm {r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, apsr}
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; CHECK-81M-NEXT: blxns r0
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; CHECK-81M-NEXT: vlldm sp
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; CHECK-81M-NEXT: add sp, #136
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; CHECK-81M-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11}
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; CHECK-81M-NEXT: pop {r7, pc}
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entry:
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tail call void %fptr() #3
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ret void
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}
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attributes #2 = { nounwind }
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attributes #3 = { "cmse_nonsecure_call" nounwind }
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define void @func3() #4 {
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; CHECK-8B-LABEL: func3:
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; CHECK-8B: @ %bb.0: @ %entry
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; CHECK-8B-NEXT: mov r0, lr
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; CHECK-8B-NEXT: mov r1, lr
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; CHECK-8B-NEXT: mov r2, lr
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; CHECK-8B-NEXT: mov r3, lr
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; CHECK-8B-NEXT: mov r12, lr
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; CHECK-8B-NEXT: msr apsr, lr
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; CHECK-8B-NEXT: bxns lr
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;
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; CHECK-8M-LABEL: func3:
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; CHECK-8M: @ %bb.0: @ %entry
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; CHECK-8M-NEXT: mov r0, lr
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; CHECK-8M-NEXT: mov r1, lr
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; CHECK-8M-NEXT: mov r2, lr
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; CHECK-8M-NEXT: mov r3, lr
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; CHECK-8M-NEXT: mov r12, lr
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; CHECK-8M-NEXT: msr apsr_nzcvq, lr
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; CHECK-8M-NEXT: bxns lr
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;
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; CHECK-81M-LABEL: func3:
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; CHECK-81M: @ %bb.0: @ %entry
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; CHECK-81M-NEXT: vstr fpcxtns, [sp, #-4]!
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; CHECK-81M-NEXT: vscclrm {s0, s1, s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, s13, s14, s15, vpr}
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; CHECK-81M-NEXT: vldr fpcxtns, [sp], #4
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; CHECK-81M-NEXT: clrm {r0, r1, r2, r3, r12, apsr}
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; CHECK-81M-NEXT: bxns lr
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entry:
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ret void
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}
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define void @func4() #4 {
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; CHECK-8B-LABEL: func4:
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; CHECK-8B: @ %bb.0: @ %entry
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; CHECK-8B-NEXT: push {r7, lr}
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; CHECK-8B-NEXT: bl func3
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; CHECK-8B-NEXT: pop {r7}
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; CHECK-8B-NEXT: pop {r0}
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; CHECK-8B-NEXT: mov lr, r0
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; CHECK-8B-NEXT: mov r0, lr
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; CHECK-8B-NEXT: mov r1, lr
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; CHECK-8B-NEXT: mov r2, lr
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; CHECK-8B-NEXT: mov r3, lr
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; CHECK-8B-NEXT: mov r12, lr
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; CHECK-8B-NEXT: msr apsr, lr
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; CHECK-8B-NEXT: bxns lr
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;
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; CHECK-8M-LABEL: func4:
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; CHECK-8M: @ %bb.0: @ %entry
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; CHECK-8M-NEXT: push {r7, lr}
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; CHECK-8M-NEXT: bl func3
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; CHECK-8M-NEXT: pop.w {r7, lr}
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; CHECK-8M-NEXT: mov r0, lr
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; CHECK-8M-NEXT: mov r1, lr
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; CHECK-8M-NEXT: mov r2, lr
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; CHECK-8M-NEXT: mov r3, lr
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; CHECK-8M-NEXT: mov r12, lr
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; CHECK-8M-NEXT: msr apsr_nzcvq, lr
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; CHECK-8M-NEXT: bxns lr
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;
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; CHECK-81M-LABEL: func4:
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; CHECK-81M: @ %bb.0: @ %entry
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; CHECK-81M-NEXT: vstr fpcxtns, [sp, #-4]!
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; CHECK-81M-NEXT: push {r7, lr}
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; CHECK-81M-NEXT: sub sp, #4
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; CHECK-81M-NEXT: bl func3
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; CHECK-81M-NEXT: add sp, #4
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; CHECK-81M-NEXT: pop.w {r7, lr}
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; CHECK-81M-NEXT: vscclrm {s0, s1, s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, s13, s14, s15, vpr}
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; CHECK-81M-NEXT: vldr fpcxtns, [sp], #4
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; CHECK-81M-NEXT: clrm {r0, r1, r2, r3, r12, apsr}
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; CHECK-81M-NEXT: bxns lr
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entry:
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tail call void @func3() #5
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ret void
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}
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declare void @func51(i8 *);
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define void @func5() #4 {
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; CHECK-8B-LABEL: func5:
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; CHECK-8B: @ %bb.0:
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; CHECK-8B-NEXT: push {r4, r6, r7, lr}
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; CHECK-8B-NEXT: add r7, sp, #8
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; CHECK-8B-NEXT: sub sp, #16
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; CHECK-8B-NEXT: mov r4, sp
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; CHECK-8B-NEXT: lsrs r4, r4, #4
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; CHECK-8B-NEXT: lsls r4, r4, #4
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; CHECK-8B-NEXT: mov sp, r4
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; CHECK-8B-NEXT: mov r0, sp
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; CHECK-8B-NEXT: bl func51
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; CHECK-8B-NEXT: subs r4, r7, #7
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; CHECK-8B-NEXT: subs r4, #1
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; CHECK-8B-NEXT: mov sp, r4
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; CHECK-8B-NEXT: pop {r4, r6, r7}
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; CHECK-8B-NEXT: pop {r0}
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; CHECK-8B-NEXT: mov lr, r0
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; CHECK-8B-NEXT: mov r0, lr
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; CHECK-8B-NEXT: mov r1, lr
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; CHECK-8B-NEXT: mov r2, lr
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; CHECK-8B-NEXT: mov r3, lr
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; CHECK-8B-NEXT: mov r12, lr
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; CHECK-8B-NEXT: msr apsr, lr
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; CHECK-8B-NEXT: bxns lr
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;
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; CHECK-8M-LABEL: func5:
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; CHECK-8M: @ %bb.0:
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; CHECK-8M-NEXT: push {r4, r6, r7, lr}
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; CHECK-8M-NEXT: add r7, sp, #8
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; CHECK-8M-NEXT: sub sp, #16
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; CHECK-8M-NEXT: mov r4, sp
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; CHECK-8M-NEXT: bfc r4, #0, #4
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; CHECK-8M-NEXT: mov sp, r4
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; CHECK-8M-NEXT: mov r0, sp
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; CHECK-8M-NEXT: bl func51
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; CHECK-8M-NEXT: sub.w r4, r7, #8
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; CHECK-8M-NEXT: mov sp, r4
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; CHECK-8M-NEXT: pop.w {r4, r6, r7, lr}
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; CHECK-8M-NEXT: mov r0, lr
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; CHECK-8M-NEXT: mov r1, lr
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; CHECK-8M-NEXT: mov r2, lr
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; CHECK-8M-NEXT: mov r3, lr
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; CHECK-8M-NEXT: mov r12, lr
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; CHECK-8M-NEXT: msr apsr_nzcvq, lr
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; CHECK-8M-NEXT: bxns lr
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;
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; CHECK-81M-LABEL: func5:
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; CHECK-81M: @ %bb.0:
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; CHECK-81M-NEXT: vstr fpcxtns, [sp, #-4]!
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; CHECK-81M-NEXT: push {r4, r6, r7, lr}
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; CHECK-81M-NEXT: add r7, sp, #8
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; CHECK-81M-NEXT: sub sp, #12
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; CHECK-81M-NEXT: mov r4, sp
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; CHECK-81M-NEXT: bfc r4, #0, #4
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; CHECK-81M-NEXT: mov sp, r4
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; CHECK-81M-NEXT: mov r0, sp
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; CHECK-81M-NEXT: bl func51
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; CHECK-81M-NEXT: sub.w r4, r7, #8
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; CHECK-81M-NEXT: mov sp, r4
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; CHECK-81M-NEXT: pop.w {r4, r6, r7, lr}
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; CHECK-81M-NEXT: vscclrm {s0, s1, s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, s13, s14, s15, vpr}
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; CHECK-81M-NEXT: vldr fpcxtns, [sp], #4
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; CHECK-81M-NEXT: clrm {r0, r1, r2, r3, r12, apsr}
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; CHECK-81M-NEXT: bxns lr
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%1 = alloca i8, align 16
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call void @func51(i8* nonnull %1) #5
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ret void
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}
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attributes #4 = { "cmse_nonsecure_entry" nounwind }
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attributes #5 = { nounwind }
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