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c8898a2a81
Summary: This patch adds some basic operations for fp16 vectors, such as bitcast from fp16 to i16, required to perform extract_subvector (also added here) and extract_element. Reviewers: SjoerdMeijer, DavidSpickett, t.p.northover, ostannard Reviewed By: ostannard Subscribers: javed.absar, kristof.beyls, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D60618 llvm-svn: 359433
227 lines
7.4 KiB
LLVM
227 lines
7.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=armv8a -mattr=+armv8.2-a,+fullfp16,+neon -target-abi=aapcs-gnu -float-abi=soft -o - %s | FileCheck %s --check-prefix=SOFT
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; RUN: llc -mtriple=armv8a -mattr=+armv8.2-a,+fullfp16,+neon -target-abi=aapcs-gnu -float-abi=hard -o - %s | FileCheck %s --check-prefix=HARD
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; RUN: llc -mtriple=armeb-eabi -mattr=+armv8.2-a,+fullfp16,+neon -target-abi=aapcs-gnu -float-abi=soft -o - %s | FileCheck %s --check-prefix=SOFTEB
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; RUN: llc -mtriple=armeb-eabi -mattr=+armv8.2-a,+fullfp16,+neon -target-abi=aapcs-gnu -float-abi=hard -o - %s | FileCheck %s --check-prefix=HARDEB
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declare <4 x half> @llvm.fabs.v4f16(<4 x half>)
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declare <8 x half> @llvm.fabs.v8f16(<8 x half>)
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declare void @use(double, float, <4 x half>, i16, <8 x half>)
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define <4 x half> @test_vabs_f16(<4 x half> %a) {
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; SOFT-LABEL: test_vabs_f16:
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; SOFT: @ %bb.0: @ %entry
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; SOFT-NEXT: vmov d16, r0, r1
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; SOFT-NEXT: vabs.f16 d16, d16
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; SOFT-NEXT: vmov r0, r1, d16
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; SOFT-NEXT: bx lr
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;
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; HARD-LABEL: test_vabs_f16:
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; HARD: @ %bb.0: @ %entry
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; HARD-NEXT: vabs.f16 d0, d0
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; HARD-NEXT: bx lr
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;
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; SOFTEB-LABEL: test_vabs_f16:
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; SOFTEB: @ %bb.0: @ %entry
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; SOFTEB-NEXT: vmov d16, r1, r0
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; SOFTEB-NEXT: vrev64.16 d16, d16
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; SOFTEB-NEXT: vabs.f16 d16, d16
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; SOFTEB-NEXT: vrev64.16 d16, d16
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; SOFTEB-NEXT: vmov r1, r0, d16
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; SOFTEB-NEXT: bx lr
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;
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; HARDEB-LABEL: test_vabs_f16:
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; HARDEB: @ %bb.0: @ %entry
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; HARDEB-NEXT: vrev64.16 d16, d0
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; HARDEB-NEXT: vabs.f16 d16, d16
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; HARDEB-NEXT: vrev64.16 d0, d16
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; HARDEB-NEXT: bx lr
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entry:
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%vabs1.i = tail call <4 x half> @llvm.fabs.v4f16(<4 x half> %a)
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ret <4 x half> %vabs1.i
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}
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define <8 x half> @test2_vabs_f16(<8 x half> %a) {
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; SOFT-LABEL: test2_vabs_f16:
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; SOFT: @ %bb.0: @ %entry
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; SOFT-NEXT: vmov d17, r2, r3
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; SOFT-NEXT: vmov d16, r0, r1
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; SOFT-NEXT: vabs.f16 q8, q8
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; SOFT-NEXT: vmov r0, r1, d16
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; SOFT-NEXT: vmov r2, r3, d17
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; SOFT-NEXT: bx lr
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;
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; HARD-LABEL: test2_vabs_f16:
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; HARD: @ %bb.0: @ %entry
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; HARD-NEXT: vabs.f16 q0, q0
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; HARD-NEXT: bx lr
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;
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; SOFTEB-LABEL: test2_vabs_f16:
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; SOFTEB: @ %bb.0: @ %entry
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; SOFTEB-NEXT: vmov d17, r3, r2
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; SOFTEB-NEXT: vmov d16, r1, r0
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; SOFTEB-NEXT: vrev64.16 q8, q8
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; SOFTEB-NEXT: vabs.f16 q8, q8
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; SOFTEB-NEXT: vrev64.16 q8, q8
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; SOFTEB-NEXT: vmov r1, r0, d16
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; SOFTEB-NEXT: vmov r3, r2, d17
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; SOFTEB-NEXT: bx lr
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;
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; HARDEB-LABEL: test2_vabs_f16:
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; HARDEB: @ %bb.0: @ %entry
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; HARDEB-NEXT: vrev64.16 q8, q0
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; HARDEB-NEXT: vabs.f16 q8, q8
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; HARDEB-NEXT: vrev64.16 q0, q8
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; HARDEB-NEXT: bx lr
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entry:
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%vabs1.i = tail call <8 x half> @llvm.fabs.v8f16(<8 x half> %a)
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ret <8 x half> %vabs1.i
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}
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define void @test(double, float, i16, <4 x half>, <8 x half>) {
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; SOFT-LABEL: test:
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; SOFT: @ %bb.0: @ %entry
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; SOFT-NEXT: push {r11, lr}
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; SOFT-NEXT: sub sp, sp, #32
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; SOFT-NEXT: vldr d16, [sp, #40]
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; SOFT-NEXT: mov r12, #16
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; SOFT-NEXT: vabs.f16 d16, d16
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; SOFT-NEXT: mov lr, sp
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; SOFT-NEXT: vst1.16 {d16}, [lr:64], r12
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; SOFT-NEXT: add r12, sp, #48
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; SOFT-NEXT: vld1.64 {d16, d17}, [r12]
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; SOFT-NEXT: vabs.f16 q8, q8
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; SOFT-NEXT: str r3, [sp, #8]
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; SOFT-NEXT: vst1.64 {d16, d17}, [lr]
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; SOFT-NEXT: bl use
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; SOFT-NEXT: add sp, sp, #32
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; SOFT-NEXT: pop {r11, pc}
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;
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; HARD-LABEL: test:
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; HARD: @ %bb.0: @ %entry
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; HARD-NEXT: vabs.f16 q2, q2
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; HARD-NEXT: vabs.f16 d2, d2
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; HARD-NEXT: b use
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;
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; SOFTEB-LABEL: test:
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; SOFTEB: @ %bb.0: @ %entry
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; SOFTEB-NEXT: .save {r11, lr}
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; SOFTEB-NEXT: push {r11, lr}
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; SOFTEB-NEXT: .pad #32
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; SOFTEB-NEXT: sub sp, sp, #32
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; SOFTEB-NEXT: vldr d16, [sp, #40]
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; SOFTEB-NEXT: mov r12, #16
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; SOFTEB-NEXT: mov lr, sp
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; SOFTEB-NEXT: str r3, [sp, #8]
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; SOFTEB-NEXT: vrev64.16 d16, d16
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; SOFTEB-NEXT: vabs.f16 d16, d16
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; SOFTEB-NEXT: vst1.16 {d16}, [lr:64], r12
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; SOFTEB-NEXT: add r12, sp, #48
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; SOFTEB-NEXT: vld1.64 {d16, d17}, [r12]
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; SOFTEB-NEXT: vrev64.16 q8, q8
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; SOFTEB-NEXT: vabs.f16 q8, q8
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; SOFTEB-NEXT: vrev64.16 q8, q8
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; SOFTEB-NEXT: vst1.64 {d16, d17}, [lr]
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; SOFTEB-NEXT: bl use
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; SOFTEB-NEXT: add sp, sp, #32
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; SOFTEB-NEXT: pop {r11, pc}
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;
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; HARDEB-LABEL: test:
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; HARDEB: @ %bb.0: @ %entry
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; HARDEB-NEXT: vrev64.16 d16, d2
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; HARDEB-NEXT: vabs.f16 d16, d16
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; HARDEB-NEXT: vrev64.16 d2, d16
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; HARDEB-NEXT: vrev64.16 q8, q2
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; HARDEB-NEXT: vabs.f16 q8, q8
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; HARDEB-NEXT: vrev64.16 q2, q8
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; HARDEB-NEXT: b use
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entry:
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%5 = tail call <4 x half> @llvm.fabs.v4f16(<4 x half> %3)
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%6 = tail call <8 x half> @llvm.fabs.v8f16(<8 x half> %4)
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tail call void @use(double %0, float %1, <4 x half> %5, i16 %2, <8 x half> %6)
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ret void
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}
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define void @many_args_test(double, float, i16, <4 x half>, <8 x half>, <8 x half>, <8 x half>) {
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; SOFT-LABEL: many_args_test:
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; SOFT: @ %bb.0: @ %entry
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; SOFT-NEXT: push {r11, lr}
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; SOFT-NEXT: sub sp, sp, #32
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; SOFT-NEXT: add r12, sp, #80
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; SOFT-NEXT: mov lr, sp
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; SOFT-NEXT: vld1.64 {d16, d17}, [r12]
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; SOFT-NEXT: add r12, sp, #48
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; SOFT-NEXT: vabs.f16 q8, q8
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; SOFT-NEXT: vld1.64 {d18, d19}, [r12]
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; SOFT-NEXT: add r12, sp, #64
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; SOFT-NEXT: str r3, [sp, #8]
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; SOFT-NEXT: vadd.f16 q8, q8, q9
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; SOFT-NEXT: vld1.64 {d18, d19}, [r12]
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; SOFT-NEXT: mov r12, #16
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; SOFT-NEXT: vmul.f16 q8, q9, q8
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; SOFT-NEXT: vldr d18, [sp, #40]
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; SOFT-NEXT: vst1.16 {d18}, [lr:64], r12
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; SOFT-NEXT: vst1.64 {d16, d17}, [lr]
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; SOFT-NEXT: bl use
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; SOFT-NEXT: add sp, sp, #32
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; SOFT-NEXT: pop {r11, pc}
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;
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; HARD-LABEL: many_args_test:
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; HARD: @ %bb.0: @ %entry
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; HARD-NEXT: mov r1, sp
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; HARD-NEXT: vld1.64 {d16, d17}, [r1]
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; HARD-NEXT: vabs.f16 q8, q8
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; HARD-NEXT: vadd.f16 q8, q8, q2
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; HARD-NEXT: vmul.f16 q2, q3, q8
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; HARD-NEXT: b use
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;
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; SOFTEB-LABEL: many_args_test:
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; SOFTEB: @ %bb.0: @ %entry
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; SOFTEB-NEXT: .save {r11, lr}
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; SOFTEB-NEXT: push {r11, lr}
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; SOFTEB-NEXT: .pad #32
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; SOFTEB-NEXT: sub sp, sp, #32
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; SOFTEB-NEXT: vldr d16, [sp, #40]
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; SOFTEB-NEXT: mov r12, #16
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; SOFTEB-NEXT: mov lr, sp
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; SOFTEB-NEXT: str r3, [sp, #8]
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; SOFTEB-NEXT: vrev64.16 d16, d16
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; SOFTEB-NEXT: vst1.16 {d16}, [lr:64], r12
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; SOFTEB-NEXT: add r12, sp, #80
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; SOFTEB-NEXT: vld1.64 {d16, d17}, [r12]
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; SOFTEB-NEXT: add r12, sp, #48
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; SOFTEB-NEXT: vrev64.16 q8, q8
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; SOFTEB-NEXT: vabs.f16 q8, q8
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; SOFTEB-NEXT: vld1.64 {d18, d19}, [r12]
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; SOFTEB-NEXT: add r12, sp, #64
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; SOFTEB-NEXT: vrev64.16 q9, q9
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; SOFTEB-NEXT: vadd.f16 q8, q8, q9
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; SOFTEB-NEXT: vld1.64 {d18, d19}, [r12]
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; SOFTEB-NEXT: vrev64.16 q9, q9
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; SOFTEB-NEXT: vmul.f16 q8, q9, q8
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; SOFTEB-NEXT: vrev64.16 q8, q8
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; SOFTEB-NEXT: vst1.64 {d16, d17}, [lr]
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; SOFTEB-NEXT: bl use
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; SOFTEB-NEXT: add sp, sp, #32
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; SOFTEB-NEXT: pop {r11, pc}
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;
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; HARDEB-LABEL: many_args_test:
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; HARDEB: @ %bb.0: @ %entry
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; HARDEB-NEXT: mov r1, sp
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; HARDEB-NEXT: vld1.64 {d16, d17}, [r1]
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; HARDEB-NEXT: vrev64.16 q8, q8
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; HARDEB-NEXT: vabs.f16 q8, q8
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; HARDEB-NEXT: vrev64.16 q9, q2
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; HARDEB-NEXT: vadd.f16 q8, q8, q9
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; HARDEB-NEXT: vrev64.16 q9, q3
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; HARDEB-NEXT: vmul.f16 q8, q9, q8
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; HARDEB-NEXT: vrev64.16 q2, q8
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; HARDEB-NEXT: b use
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entry:
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%7 = tail call <8 x half> @llvm.fabs.v8f16(<8 x half> %6)
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%8 = fadd <8 x half> %7, %4
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%9 = fmul <8 x half> %5, %8
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tail call void @use(double %0, float %1, <4 x half> %3, i16 %2, <8 x half> %9)
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ret void
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}
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