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5ef0d1424c
This patch introduces the DAG version of SimplifyMultipleUseDemandedBits, which attempts to peek through ops (mainly and/or/xor so far) that don't contribute to the demandedbits/elts of a node - which means we can do this even in cases where we have multiple uses of an op, which normally requires us to demanded all bits/elts. The intention is to remove a similar instruction - SelectionDAG::GetDemandedBits - once SimplifyMultipleUseDemandedBits has matured.
The InstCombine version of SimplifyMultipleUseDemandedBits can constant fold which I haven't added here yet, and so far I've only wired this up to some basic binops (and/or/xor/add/sub/mul) to demonstrate its use.
We do see a couple of regressions that need to be addressed:
AMDGPU unsigned dot product codegen retains an AND mask (for ZERO_EXTEND) that it previously removed (but otherwise the dotproduct codegen is a lot better).
X86/AVX2 has poor handling of vector ANY_EXTEND/ANY_EXTEND_VECTOR_INREG - it prematurely gets converted to ZERO_EXTEND_VECTOR_INREG.
The code owners have confirmed its ok for these cases to fixed up in future patches.
Differential Revision: https://reviews.llvm.org/D63281
llvm-svn: 366799
51 lines
1.6 KiB
LLVM
51 lines
1.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-apple-macosx | FileCheck %s
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; Cmp lowering should not look past the truncate unless the high bits are known
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; zero.
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; rdar://12027825
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define void @foo(i8 %arg4, i32 %arg5, i32* %arg14) nounwind {
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; CHECK-LABEL: foo:
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; CHECK: ## %bb.0: ## %bb
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; CHECK-NEXT: ## kill: def $edi killed $edi def $rdi
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; CHECK-NEXT: andl $32, %edi
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; CHECK-NEXT: leal 13(%rdi), %eax
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; CHECK-NEXT: xorb $-14, %al
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; CHECK-NEXT: addb $82, %al
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; CHECK-NEXT: movzbl %al, %eax
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; CHECK-NEXT: testl %esi, %edi
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; CHECK-NEXT: movl $1, %ecx
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; CHECK-NEXT: cmovnel %eax, %ecx
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; CHECK-NEXT: xorb $81, %cl
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; CHECK-NEXT: movzbl %cl, %eax
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; CHECK-NEXT: addl $2062143348, %eax ## imm = 0x7AE9CF74
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; CHECK-NEXT: movl %eax, (%rdx)
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; CHECK-NEXT: retq
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bb:
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%tmp48 = zext i8 %arg4 to i32
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%tmp49 = and i32 %tmp48, 32
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%tmp50 = add i32 %tmp49, 1593371643
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%tmp55 = sub i32 %tmp50, 0
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%tmp56 = add i32 %tmp55, 7787538
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%tmp57 = xor i32 %tmp56, 1601159181
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%tmp58 = xor i32 %arg5, 1601159181
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%tmp59 = and i32 %tmp57, %tmp58
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%tmp60 = add i32 %tmp59, -1263900958
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%tmp67 = sub i32 %tmp60, 0
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%tmp103 = xor i32 %tmp56, 13
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%tmp104 = trunc i32 %tmp103 to i8
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%tmp105 = sub i8 0, %tmp104
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%tmp106 = add i8 %tmp105, -103
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%tmp113 = sub i8 %tmp106, 0
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%tmp114 = add i8 %tmp113, -72
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%tmp141 = icmp ne i32 %tmp67, -1263900958
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%tmp142 = select i1 %tmp141, i8 %tmp114, i8 1
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%tmp143 = xor i8 %tmp142, 81
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%tmp144 = zext i8 %tmp143 to i32
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%tmp145 = add i32 %tmp144, 2062143348
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%tmp152 = sub i32 %tmp145, 0
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store i32 %tmp152, i32* %arg14
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ret void
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}
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