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1123f44663
We lost this in D56387/rG69bc0990a9181e6eb86228276d2f59435a7fae67 - where I got the src/dst bitwidths mixed up and assumed getValidShiftAmountConstant would catch it. Patch by @craig.topper - confirmed by @Carrot that it fixes PR49162
34 lines
1.1 KiB
LLVM
34 lines
1.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64
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define i32* @PR49162(i32* %base, i160* %ptr160) {
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; X86-LABEL: PR49162:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl 8(%eax), %ecx
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; X86-NEXT: shll $16, %ecx
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; X86-NEXT: movl %ecx, %eax
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; X86-NEXT: sarl $31, %eax
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; X86-NEXT: shldl $16, %ecx, %eax
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; X86-NEXT: shll $2, %eax
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; X86-NEXT: addl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: PR49162:
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; X64: # %bb.0:
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; X64-NEXT: movl 8(%rsi), %eax
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; X64-NEXT: shll $16, %eax
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; X64-NEXT: cltq
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; X64-NEXT: sarq $16, %rax
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; X64-NEXT: leaq (%rdi,%rax,4), %rax
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; X64-NEXT: retq
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%load160 = load i160, i160* %ptr160, align 4
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%shl = shl i160 %load160, 80
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%ashr160 = ashr i160 %shl, 112
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%trunc = trunc i160 %ashr160 to i64
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%ashr64 = ashr i64 %trunc, 32
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%gep = getelementptr inbounds i32, i32* %base, i64 %ashr64
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ret i32* %gep
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}
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