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42052632ff
Relands commit 433c8d950cb3a1fa0977355ce0367e8c763a3f13 with fixes for MIPS. Similar to D102742, specifying the stack alignment via CodegenOpts means that this flag gets dropped during LTO, unless the command line is re-specified as a plugin opt. Instead, encode this information as a module level attribute so that we don't have to expose this llvm internal flag when linking the Linux kernel with LTO. Looks like external dependencies might need a fix: * https://github.com/llvm-hs/llvm-hs/issues/345 * https://github.com/halide/Halide/issues/6079 Link: https://github.com/ClangBuiltLinux/linux/issues/1377 Reviewed By: tejohnson Differential Revision: https://reviews.llvm.org/D103048
59 lines
2.4 KiB
LLVM
59 lines
2.4 KiB
LLVM
; RUN: split-file %s %t
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; RUN: cat %t/main.ll %t/align4.ll > %t/a2.ll
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; RUN: cat %t/main.ll %t/align16.ll > %t/b2.ll
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; RUN: llc -mtriple=i386-unknown-freebsd -mcpu=core2 -relocation-model=pic < %t/a2.ll | FileCheck %s -check-prefix=UNALIGNED
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; RUN: llc -mtriple=i386-unknown-freebsd -mcpu=core2 -relocation-model=pic < %t/b2.ll | FileCheck %s -check-prefix=ALIGNED
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; RUN: llc -mtriple=i386-unknown-freebsd -mcpu=core2 -stackrealign -relocation-model=pic < %t/a2.ll | FileCheck %s -check-prefix=FORCEALIGNED
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;--- main.ll
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@arr = internal unnamed_addr global [32 x i32] zeroinitializer, align 16
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; PR12250
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define i32 @test1() {
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vector.ph:
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br label %vector.body
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vector.body:
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%index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]
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%0 = getelementptr inbounds [32 x i32], [32 x i32]* @arr, i32 0, i32 %index
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%1 = bitcast i32* %0 to <4 x i32>*
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%wide.load = load <4 x i32>, <4 x i32>* %1, align 16
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%2 = add nsw <4 x i32> %wide.load, <i32 10, i32 10, i32 10, i32 10>
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%3 = xor <4 x i32> %2, <i32 123345, i32 123345, i32 123345, i32 123345>
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%4 = add nsw <4 x i32> %3, <i32 112, i32 112, i32 112, i32 112>
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%5 = xor <4 x i32> %4, <i32 543345, i32 543345, i32 543345, i32 543345>
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%6 = add nsw <4 x i32> %5, <i32 73, i32 73, i32 73, i32 73>
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%7 = xor <4 x i32> %6, <i32 345987, i32 345987, i32 345987, i32 345987>
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%8 = add nsw <4 x i32> %7, <i32 48, i32 48, i32 48, i32 48>
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%9 = xor <4 x i32> %8, <i32 123987, i32 123987, i32 123987, i32 123987>
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store <4 x i32> %9, <4 x i32>* %1, align 16
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%index.next = add i32 %index, 4
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%10 = icmp eq i32 %index.next, 32
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br i1 %10, label %middle.block, label %vector.body
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middle.block:
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ret i32 0
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; We can't fold the spill into a padd unless the stack is aligned. Just spilling
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; doesn't force stack realignment though
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; UNALIGNED-LABEL: @test1
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; UNALIGNED-NOT: andl $-{{..}}, %esp
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; UNALIGNED: movdqu {{.*}} # 16-byte Spill
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; UNALIGNED-NOT: paddd {{.*}} # 16-byte Folded Reload
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; ALIGNED-LABEL: @test1
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; ALIGNED-NOT: andl $-{{..}}, %esp
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; ALIGNED: movdqa {{.*}} # 16-byte Spill
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; ALIGNED: paddd {{.*}} # 16-byte Folded Reload
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; FORCEALIGNED-LABEL: @test1
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; FORCEALIGNED: andl $-{{..}}, %esp
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; FORCEALIGNED: movdqa {{.*}} # 16-byte Spill
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; FORCEALIGNED: paddd {{.*}} # 16-byte Folded Reload
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}
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!llvm.module.flags = !{!0}
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;--- align4.ll
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!0 = !{i32 2, !"override-stack-alignment", i32 4}
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;--- align16.ll
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!0 = !{i32 2, !"override-stack-alignment", i32 16}
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