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05fc1c63f9
While legalizing a 64-bit shift left by 1, the following occurs: We split the shift operand in half: a high half and a low half. We then create an ADDC with the low half and a ADDE with the high half + the carry bit from the ADDC. This is problematic if X is any_ext'd because the high half computation is now undef + undef + carry bit and there is no way to ensure that the two undef values had the same bitwise representation. This results in the lowest bit in the high half turning into garbage. Instead, do not try to turn shifts into arithmetic during type legalization. This fixes PR26350. llvm-svn: 259065
22 lines
608 B
LLVM
22 lines
608 B
LLVM
; RUN: llc -disable-constant-hoisting < %s | FileCheck %s
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target datalayout = "e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"
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target triple = "i386-unknown-linux-gnu"
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@d = global i32 8, align 4
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define i32 @main() {
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entry:
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%load = load i32, i32* @d, align 4
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%conv1 = zext i32 %load to i64
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%shl = shl i64 %conv1, 1
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%mul = and i64 %shl, 4294967312
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%cmp = icmp ugt i64 4294967295, %mul
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%zext = zext i1 %cmp to i32
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ret i32 %zext
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}
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; CHECK: main:
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; CHECK: movl d, %[[load:.*]]
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; CHECK: movl %[[load]], %[[copy:.*]]
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; CHECK: shrl $31, %[[copy]]
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; CHECK: addl %[[load]], %[[load]]
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