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AArch64
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Revert r319691: [globalisel][tablegen] Split atomic load/store into separate opcode and enable for AArch64.
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2017-12-05 05:52:07 +00:00 |
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AMDGPU
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AMDGPU: Fix SDWA crash on inline asm
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2017-12-05 20:32:01 +00:00 |
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ARC
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ARM
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Revert "[DAGCombine] Move AND nodes to multiple load leaves"
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2017-12-06 01:16:08 +00:00 |
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AVR
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[CodeGen] Unify MBB reference format in both MIR and debug output
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2017-12-04 17:18:51 +00:00 |
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BPF
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[CodeGen] Print register names in lowercase in both MIR and debug output
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2017-11-28 17:15:09 +00:00 |
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Generic
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[CodeGen] Unify MBB reference format in both MIR and debug output
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2017-12-04 17:18:51 +00:00 |
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Hexagon
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[CodeGen] Unify MBB reference format in both MIR and debug output
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2017-12-04 17:18:51 +00:00 |
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Inputs
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Lanai
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[CodeGen] Print "%vreg0" as "%0" in both MIR and debug output
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2017-11-30 12:12:19 +00:00 |
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Mips
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[CodeGen] Unify MBB reference format in both MIR and debug output
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2017-12-04 17:18:51 +00:00 |
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MIR
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[CodeGen] Unify MBB reference format in both MIR and debug output
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2017-12-04 17:18:51 +00:00 |
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MSP430
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[CodeGen] Unify MBB reference format in both MIR and debug output
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2017-12-04 17:18:51 +00:00 |
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Nios2
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NVPTX
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[NVPTX] Assign valid global names
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2017-12-04 14:19:33 +00:00 |
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PowerPC
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Add REQUIRES asserts in combine_loads_from_build_pair.ll
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2017-12-05 15:26:01 +00:00 |
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RISCV
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[CodeGen] Unify MBB reference format in both MIR and debug output
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2017-12-04 17:18:51 +00:00 |
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SPARC
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[CodeGen] Unify MBB reference format in both MIR and debug output
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2017-12-04 17:18:51 +00:00 |
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SystemZ
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[SystemZ] Bugfix in expandRxSBG()
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2017-12-06 13:53:24 +00:00 |
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Thumb
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[CodeGen] Always use printReg to print registers in both MIR and debug
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2017-11-30 16:12:24 +00:00 |
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Thumb2
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[CodeGen] Unify MBB reference format in both MIR and debug output
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2017-12-04 17:18:51 +00:00 |
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WebAssembly
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[WebAssembly] Implement WASM_STACK_POINTER.
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2017-12-05 17:23:43 +00:00 |
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WinEH
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X86
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[X86][AVX512] Regenerate vpmovm2*/vpmov*2m avx512 schedule tests
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2017-12-06 14:07:38 +00:00 |
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XCore
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