QingShan Zhang 54c596beca [Power9] Remove the PPCISD::XXREVERSE as it has completely the same semantics of ISD::BSWAP ... The custom node PPCISD::XXREVERSE has completely the same semantics of generic node ISD::BSWAP. We need to clean up it as we have the combine rules for bswap in the base class, while nothing for xxreverse. Differential Revision: https://reviews.llvm.org/D70657		2019-12-23 07:44:33 +00:00
..
AArch64	[AArch64] match splat of bitcasted extract subvector to DUPLANE	2019-12-22 08:37:03 -05:00
AMDGPU	[DAGCombiner] Check term use before applying aggressive FSUB optimisations	2019-12-23 09:37:58 +09:00
ARC
ARM	Revert "[ARM] Improve codegen of volatile load/store of i64"	2019-12-20 18:08:24 +00:00
AVR	[AVR] Fix codegen for rotate instructions	2019-12-23 11:41:28 +08:00
BPF
Generic
Hexagon
Inputs
Lanai
Mips	Mips: Make test resistant to future changes	2019-12-21 04:56:20 -05:00
MIR
MSP430
NVPTX
PowerPC	[Power9] Remove the PPCISD::XXREVERSE as it has completely the same semantics of ISD::BSWAP	2019-12-23 07:44:33 +00:00
RISCV	[RISCV] Enable the machine outliner for RISC-V	2019-12-19 16:41:53 +00:00
SPARC
SystemZ	[SystemZ] Add a mapping from "select register" to "load on condition" (2-addr).	2019-12-20 10:44:58 -08:00
Thumb
Thumb2	[ARM][MVE] Fixes for tail predication.	2019-12-20 09:34:18 +00:00
WebAssembly	[WebAssembly] Add avgr_u intrinsics and require nuw in patterns	2019-12-18 15:31:38 -08:00
WinCFGuard
WinEH
X86	[SelectionDAG] Copy FP flags when visiting a binary instruction.	2019-12-22 14:29:36 -05:00
XCore