1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-23 03:02:36 +01:00
llvm-mirror/test/CodeGen/MSP430
joanlluch a1334aac0e [TargetLowering][DAGCombine][MSP430] Shift Amount Threshold in DAGCombine (4)
Summary:
Replaces
```
unsigned getShiftAmountThreshold(EVT VT)
```
by

```
bool shouldAvoidTransformToShift(EVT VT, unsigned amount)
```
thus giving more flexibility for targets to decide whether particular shift amounts must be considered expensive or not.

Updates the MSP430 target with a custom implementation.

This continues  D69116, D69120, D69326 and updates them, so all of them must be committed before this.

Existing tests apply, a few more have been added.

Reviewers: asl, spatel

Reviewed By: spatel

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D70042
2019-11-13 09:23:08 +01:00
..
2009-05-10-CyclicDAG.ll
2009-05-17-Rot.ll
2009-05-17-Shift.ll
2009-05-19-DoubleSplit.ll
2009-08-25-DynamicStackAlloc.ll
2009-09-18-AbsoluteAddr.ll
2009-10-10-OrImpDef.ll
2009-11-08-InvalidResNo.ll
2009-11-20-NewNode.ll
2009-12-21-FrameAddr.ll
2009-12-22-InlineAsm.ll
2010-05-01-CombinerAnd.ll
AddrMode-bis-rx.ll
AddrMode-bis-xr.ll
AddrMode-mov-rx.ll
AddrMode-mov-xr.ll
asm-clobbers.ll
bit.ll
BranchSelector.ll
byval.ll
callee-saved.ll
calls.ll
cc_args.ll
cc_ret.ll
DbgValueOtherTargets.test
flt_rounds.ll
fp.ll
hwmult16.ll
hwmult32.ll
hwmultf5.ll
indirectbr2.ll
indirectbr.ll
inline-asm-absolute-addressing.ll
inline-asm.ll
inlineasm-output-template.ll
Inst8mi.ll
Inst8mm.ll
Inst8mr.ll
Inst8ri.ll
Inst8rm.ll
Inst8rr.ll
Inst16mi.ll
Inst16mm.ll
Inst16mr.ll
Inst16ri.ll
Inst16rm.ll
Inst16rr.ll
InstII.ll
interrupt.ll
jumptable.ll
libcalls.ll
lit.local.cfg
memset.ll
misched-msp430.ll
mult-alt-generic-msp430.ll
postinc.ll
promote-i8-mul.ll
select-use-sr.ll
selectcc.ll [DAGCombiner] add operation legality checks before creating shift ops (PR43542) 2019-10-03 21:34:04 +00:00
setcc.ll
shift-amount-threshold-b.ll [TargetLowering][DAGCombine][MSP430] Shift Amount Threshold in DAGCombine (3) 2019-11-11 10:18:25 +01:00
shift-amount-threshold.ll [TargetLowering][DAGCombine][MSP430] Shift Amount Threshold in DAGCombine (4) 2019-11-13 09:23:08 +01:00
shifts.ll
spill-to-stack.ll
stacksave_restore.ll
struct_layout.ll
struct-return.ll
transient-stack-alignment.ll
umulo-16.ll
vararg.ll