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75a022ea2b
Summary: LLVM Allows Targets to provide information that guides optimisations made to LLVM IR. This is done with callbacks on a TargetTransformInfo object. This patch adds a TargetTransformInfo class for RISC-V. This will allow us to implement RISC-V specific callbacks as they become necessary. This commit also adds the getIntImmCost callbacks, and tests them with a simple constant hoisting test. Our immediate costs are on the conservative side, for the moment, but we prevent hoisting in most circumstances anyway. Previous review was on D63007 Reviewers: asb, luismarques Reviewed By: asb Subscribers: ributzka, MaskRay, llvm-commits, Jim, benna, psnobl, jocewei, PkmX, rkruppe, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones, zzheng, jrtc27, shiva0217, kito-cheng, niosHD, sabuasal, apazos, simoncook, johnrusso, rbar, hiraditya, mgorny Tags: #llvm Differential Revision: https://reviews.llvm.org/D63433 llvm-svn: 364046
35 lines
1.0 KiB
Plaintext
35 lines
1.0 KiB
Plaintext
;===- ./lib/Target/RISCV/LLVMBuild.txt -------------------------*- Conf -*--===;
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;
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; Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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; See https://llvm.org/LICENSE.txt for license information.
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; SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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;
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;===------------------------------------------------------------------------===;
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;
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; This is an LLVMBuild description file for the components in this subdirectory.
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;
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; For more information on the LLVMBuild system, please see:
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;
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; http://llvm.org/docs/LLVMBuild.html
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;
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;===------------------------------------------------------------------------===;
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[common]
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subdirectories = AsmParser Disassembler TargetInfo MCTargetDesc Utils
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[component_0]
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type = TargetGroup
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name = RISCV
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parent = Target
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has_asmparser = 1
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has_asmprinter = 1
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has_disassembler = 1
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[component_1]
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type = Library
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name = RISCVCodeGen
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parent = RISCV
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required_libraries = Analysis AsmPrinter Core CodeGen MC RISCVDesc
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RISCVInfo RISCVUtils SelectionDAG Support Target
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add_to_library_groups = RISCV
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