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Summary: LLVM Allows Targets to provide information that guides optimisations made to LLVM IR. This is done with callbacks on a TargetTransformInfo object. This patch adds a TargetTransformInfo class for RISC-V. This will allow us to implement RISC-V specific callbacks as they become necessary. This commit also adds the getIntImmCost callbacks, and tests them with a simple constant hoisting test. Our immediate costs are on the conservative side, for the moment, but we prevent hoisting in most circumstances anyway. Previous review was on D63007 Reviewers: asb, luismarques Reviewed By: asb Subscribers: ributzka, MaskRay, llvm-commits, Jim, benna, psnobl, jocewei, PkmX, rkruppe, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones, zzheng, jrtc27, shiva0217, kito-cheng, niosHD, sabuasal, apazos, simoncook, johnrusso, rbar, hiraditya, mgorny Tags: #llvm Differential Revision: https://reviews.llvm.org/D63433 llvm-svn: 364046
48 lines
1.6 KiB
C++
48 lines
1.6 KiB
C++
//===-- RISCVTargetMachine.h - Define TargetMachine for RISCV ---*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares the RISCV specific subclass of TargetMachine.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_RISCV_RISCVTARGETMACHINE_H
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#define LLVM_LIB_TARGET_RISCV_RISCVTARGETMACHINE_H
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#include "MCTargetDesc/RISCVMCTargetDesc.h"
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#include "RISCVSubtarget.h"
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#include "llvm/CodeGen/SelectionDAGTargetInfo.h"
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#include "llvm/IR/DataLayout.h"
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#include "llvm/Target/TargetMachine.h"
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namespace llvm {
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class RISCVTargetMachine : public LLVMTargetMachine {
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std::unique_ptr<TargetLoweringObjectFile> TLOF;
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RISCVSubtarget Subtarget;
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public:
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RISCVTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
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StringRef FS, const TargetOptions &Options,
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Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
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CodeGenOpt::Level OL, bool JIT);
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const RISCVSubtarget *getSubtargetImpl(const Function &) const override {
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return &Subtarget;
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}
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TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
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TargetLoweringObjectFile *getObjFileLowering() const override {
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return TLOF.get();
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}
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TargetTransformInfo getTargetTransformInfo(const Function &F) override;
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};
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}
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#endif
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