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7a93cbe27f
A Thumb-2 post-indexed LDR instruction such as: ldr.w r0, [r1], #4 Can be rewritten as: ldm.n r1!, {r0} LDMs can be more expensive than LDRs on some cores, so this has been enabled only in minsize mode. llvm-svn: 272002
53 lines
1.9 KiB
LLVM
53 lines
1.9 KiB
LLVM
; RUN: llc < %s | FileCheck %s
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target datalayout = "e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-f64:32:64-v64:32:64-v128:32:128-a:0:32-n32-S32"
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target triple = "thumbv7m--linux-gnu"
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; CHECK-LABEL: f:
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; CHECK: ldm r{{[0-9]}}!, {r[[x:[0-9]]]}
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; CHECK: add.w r[[x]], r[[x]], #3
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; CHECK: stm r{{[0-9]}}!, {r[[x]]}
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define void @f(i32 %n, i32* nocapture %a, i32* nocapture readonly %b) optsize minsize {
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%1 = icmp sgt i32 %n, 0
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br i1 %1, label %.lr.ph, label %._crit_edge
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.lr.ph: ; preds = %.lr.ph, %0
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%i.04 = phi i32 [ %6, %.lr.ph ], [ 0, %0 ]
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%.03 = phi i32* [ %2, %.lr.ph ], [ %b, %0 ]
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%.012 = phi i32* [ %5, %.lr.ph ], [ %a, %0 ]
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%2 = getelementptr inbounds i32, i32* %.03, i32 1
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%3 = load i32, i32* %.03, align 4
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%4 = add nsw i32 %3, 3
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%5 = getelementptr inbounds i32, i32* %.012, i32 1
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store i32 %4, i32* %.012, align 4
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%6 = add nsw i32 %i.04, 1
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%exitcond = icmp eq i32 %6, %n
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br i1 %exitcond, label %._crit_edge, label %.lr.ph
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._crit_edge: ; preds = %.lr.ph, %0
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ret void
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}
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; CHECK-LABEL: f_nominsize:
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; CHECK-NOT: ldm
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define void @f_nominsize(i32 %n, i32* nocapture %a, i32* nocapture readonly %b) optsize {
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%1 = icmp sgt i32 %n, 0
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br i1 %1, label %.lr.ph, label %._crit_edge
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.lr.ph: ; preds = %.lr.ph, %0
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%i.04 = phi i32 [ %6, %.lr.ph ], [ 0, %0 ]
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%.03 = phi i32* [ %2, %.lr.ph ], [ %b, %0 ]
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%.012 = phi i32* [ %5, %.lr.ph ], [ %a, %0 ]
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%2 = getelementptr inbounds i32, i32* %.03, i32 1
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%3 = load i32, i32* %.03, align 4
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%4 = add nsw i32 %3, 3
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%5 = getelementptr inbounds i32, i32* %.012, i32 1
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store i32 %4, i32* %.012, align 4
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%6 = add nsw i32 %i.04, 1
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%exitcond = icmp eq i32 %6, %n
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br i1 %exitcond, label %._crit_edge, label %.lr.ph
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._crit_edge: ; preds = %.lr.ph, %0
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ret void
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}
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