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llvm-mirror/test/MC/Mips/mips64r5/abi-bad.s
Daniel Sanders 1701d245d4 [mips] Add backend support for Mips32r[35] and Mips64r[35].
Summary:
These ISA's didn't add any instructions so they are almost identical to
Mips32r2 and Mips64r2. Even the ELF e_flags are the same, However the ISA
revision in .MIPS.abiflags is 3 or 5 respectively instead of 2.

Reviewers: vmedic

Reviewed By: vmedic

Subscribers: tomatabacu, llvm-commits, atanasyan

Differential Revision: http://reviews.llvm.org/D7381

llvm-svn: 229695
2015-02-18 16:24:50 +00:00

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ArmAsm

# RUN: not llvm-mc %s -triple mips-unknown-linux -mcpu=mips64r5 2>&1 | FileCheck %s
.set fp=xx
# CHECK: error: '.set fp=xx' requires the O32 ABI
# CHECK: .set fp=xx
# CHECK: ^