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98966fc3a3
Previously prefetch was only considered legal if sse was enabled, but it should be supported with 3dnow as well. The prfchw flag now imply at least some form of prefetch without the write hint is available, either the sse or 3dnow version. This is true even if 3dnow and sse are explicitly disabled. Similarly prefetchwt1 feature implies availability of prefetchw and the the prefetcht0/1/2/nta instructions. This way we can support _MM_HINT_ET0 using prefetchw and _MM_HINT_ET1 with prefetchwt1. And its assumed that if we have levels for the write hint we would have levels for the non-write hint, thus why we enable the sse prefetch instructions. I believe this behavior is consistent with gcc. I've updated the prefetch.ll to test all of these combinations. llvm-svn: 321335
95 lines
2.5 KiB
ArmAsm
95 lines
2.5 KiB
ArmAsm
// RUN: llvm-mc -triple x86_64-unknown-unknown --show-encoding %s | FileCheck %s
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// PR8283
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// CHECK: pavgusb %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0xbf]
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pavgusb %mm2, %mm1
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// CHECK: pavgusb 9(%esi,%edx), %mm3 # encoding: [0x67,0x0f,0x0f,0x5c,0x16,0x09,0xbf]
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pavgusb 9(%esi,%edx), %mm3
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// CHECK: pf2id %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0x1d]
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pf2id %mm2, %mm1
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// CHECK: pf2id 9(%esi,%edx), %mm3 # encoding: [0x67,0x0f,0x0f,0x5c,0x16,0x09,0x1d]
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pf2id 9(%esi,%edx), %mm3
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// CHECK: pfacc %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0xae]
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pfacc %mm2, %mm1
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// CHECK: pfadd %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0x9e]
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pfadd %mm2, %mm1
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// CHECK: pfcmpeq %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0xb0]
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pfcmpeq %mm2, %mm1
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// CHECK: pfcmpge %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0x90]
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pfcmpge %mm2, %mm1
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// CHECK: pfcmpgt %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0xa0]
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pfcmpgt %mm2, %mm1
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// CHECK: pfmax %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0xa4]
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pfmax %mm2, %mm1
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// CHECK: pfmin %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0x94]
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pfmin %mm2, %mm1
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// CHECK: pfmul %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0xb4]
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pfmul %mm2, %mm1
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// CHECK: pfrcp %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0x96]
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pfrcp %mm2, %mm1
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// CHECK: pfrcpit1 %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0xa6]
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pfrcpit1 %mm2, %mm1
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// CHECK: pfrcpit2 %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0xb6]
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pfrcpit2 %mm2, %mm1
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// CHECK: pfrsqit1 %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0xa7]
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pfrsqit1 %mm2, %mm1
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// CHECK: pfrsqrt %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0x97]
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pfrsqrt %mm2, %mm1
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// CHECK: pfsub %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0x9a]
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pfsub %mm2, %mm1
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// CHECK: pfsubr %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0xaa]
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pfsubr %mm2, %mm1
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// CHECK: pi2fd %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0x0d]
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pi2fd %mm2, %mm1
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// CHECK: pmulhrw %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0xb7]
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pmulhrw %mm2, %mm1
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// CHECK: femms # encoding: [0x0f,0x0e]
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femms
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// CHECK: prefetch (%rax) # encoding: [0x0f,0x0d,0x00]
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// CHECK: prefetchw (%rax) # encoding: [0x0f,0x0d,0x08]
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// CHECK: prefetchwt1 (%rax) # encoding: [0x0f,0x0d,0x10]
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prefetch (%rax)
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prefetchw (%rax)
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prefetchwt1 (%rax)
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// CHECK: pf2iw %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0x1c]
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pf2iw %mm2, %mm1
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// CHECK: pi2fw %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0x0c]
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pi2fw %mm2, %mm1
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// CHECK: pfnacc %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0x8a]
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pfnacc %mm2, %mm1
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// CHECK: pfpnacc %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0x8e]
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pfpnacc %mm2, %mm1
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// CHECK: pswapd %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0xbb]
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pswapd %mm2, %mm1
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