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8b3116b36c
Adds patterns to catch masks preceeding a long multiply, and generating a single umull/smull instruction instead. Differential revision: https://reviews.llvm.org/D89956
79 lines
1.9 KiB
LLVM
79 lines
1.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=aarch64-none-linux-gnu < %s -o -| FileCheck %s
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define i64 @umull(i64 %x0, i64 %x1) {
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; CHECK-LABEL: umull:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: umull x0, w1, w0
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; CHECK-NEXT: ret
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entry:
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%and = and i64 %x0, 4294967295
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%and1 = and i64 %x1, 4294967295
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%mul = mul nuw i64 %and1, %and
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ret i64 %mul
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}
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define i64 @umull2(i64 %x, i32 %y) {
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; CHECK-LABEL: umull2:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: umull x0, w0, w1
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; CHECK-NEXT: ret
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entry:
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%and = and i64 %x, 4294967295
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%conv = zext i32 %y to i64
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%mul = mul nuw nsw i64 %and, %conv
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ret i64 %mul
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}
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define i64 @umull2_commuted(i64 %x, i32 %y) {
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; CHECK-LABEL: umull2_commuted:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: umull x0, w0, w1
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; CHECK-NEXT: ret
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entry:
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%and = and i64 %x, 4294967295
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%conv = zext i32 %y to i64
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%mul = mul nuw nsw i64 %conv, %and
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ret i64 %mul
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}
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define i64 @smull(i64 %x0, i64 %x1) {
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; CHECK-LABEL: smull:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: smull x0, w1, w0
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; CHECK-NEXT: ret
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entry:
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%sext = shl i64 %x0, 32
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%conv1 = ashr exact i64 %sext, 32
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%sext4 = shl i64 %x1, 32
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%conv3 = ashr exact i64 %sext4, 32
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%mul = mul nsw i64 %conv3, %conv1
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ret i64 %mul
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}
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define i64 @smull2(i64 %x, i32 %y) {
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; CHECK-LABEL: smull2:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: smull x0, w0, w1
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; CHECK-NEXT: ret
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entry:
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%shl = shl i64 %x, 32
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%shr = ashr exact i64 %shl, 32
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%conv = sext i32 %y to i64
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%mul = mul nsw i64 %shr, %conv
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ret i64 %mul
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}
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define i64 @smull2_commuted(i64 %x, i32 %y) {
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; CHECK-LABEL: smull2_commuted:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: smull x0, w0, w1
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; CHECK-NEXT: ret
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entry:
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%shl = shl i64 %x, 32
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%shr = ashr exact i64 %shl, 32
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%conv = sext i32 %y to i64
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%mul = mul nsw i64 %conv, %shr
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ret i64 %mul
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}
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