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Previously NEON used a target specific intrinsic for frintn, given that the FROUNDEVEN ISD node now exists, move over to that instead and add codegen support for that node for both NEON and fixed length SVE. Differential Revision: https://reviews.llvm.org/D98487
42 lines
1.4 KiB
LLVM
42 lines
1.4 KiB
LLVM
; RUN: llc -mtriple=aarch64-eabi -mattr=+fullfp16 %s -o - | FileCheck %s
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; The llvm.aarch64.neon.frintn intrinsic should be auto-upgraded to the
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; target-independent roundeven intrinsic.
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define <4 x half> @frintn_4h(<4 x half> %A) nounwind {
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;CHECK-LABEL: frintn_4h:
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;CHECK: frintn v0.4h, v0.4h
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;CHECK-NEXT: ret
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%tmp3 = call <4 x half> @llvm.aarch64.neon.frintn.v4f16(<4 x half> %A)
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ret <4 x half> %tmp3
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}
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define <2 x float> @frintn_2s(<2 x float> %A) nounwind {
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;CHECK-LABEL: frintn_2s:
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;CHECK: frintn v0.2s, v0.2s
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;CHECK-NEXT: ret
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%tmp3 = call <2 x float> @llvm.aarch64.neon.frintn.v2f32(<2 x float> %A)
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ret <2 x float> %tmp3
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}
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define <4 x float> @frintn_4s(<4 x float> %A) nounwind {
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;CHECK-LABEL: frintn_4s:
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;CHECK: frintn v0.4s, v0.4s
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;CHECK-NEXT: ret
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%tmp3 = call <4 x float> @llvm.aarch64.neon.frintn.v4f32(<4 x float> %A)
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ret <4 x float> %tmp3
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}
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define <2 x double> @frintn_2d(<2 x double> %A) nounwind {
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;CHECK-LABEL: frintn_2d:
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;CHECK: frintn v0.2d, v0.2d
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;CHECK-NEXT: ret
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%tmp3 = call <2 x double> @llvm.aarch64.neon.frintn.v2f64(<2 x double> %A)
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ret <2 x double> %tmp3
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}
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declare <4 x half> @llvm.aarch64.neon.frintn.v4f16(<4 x half>) nounwind readnone
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declare <2 x float> @llvm.aarch64.neon.frintn.v2f32(<2 x float>) nounwind readnone
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declare <4 x float> @llvm.aarch64.neon.frintn.v4f32(<4 x float>) nounwind readnone
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declare <2 x double> @llvm.aarch64.neon.frintn.v2f64(<2 x double>) nounwind readnone
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